參數(shù)資料
型號(hào): PIC32MX575F256L-80I/PF
廠商: Microchip Technology
文件頁(yè)數(shù): 47/64頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 256KB FLASH 100TQFP
特色產(chǎn)品: 32-Bit PIC? Microcontroller
PIC32 32-Bit MCU Families
標(biāo)準(zhǔn)包裝: 90
系列: PIC® 32MX
核心處理器: MIPS32? M4K?
芯體尺寸: 32-位
速度: 80MHz
連通性: CAN,I²C,SPI,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 85
程序存儲(chǔ)器容量: 256KB(256K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 650 (CN2011-ZH PDF)
2007-2012 Microchip Technology Inc.
DS61145K-page 51
PIC32MX
18.2 Device Code Protection bit (CP)
The PIC32MX family of devices features a single
device Code Protection bit (CP). When CP is
programmed to ‘0’, boot Flash and program Flash are
protected from being read or written by an external pro-
gramming device. When code protection is enabled,
only the Device ID and User ID registers are available
to be read by an external programmer. However, Boot
Flash and program Flash memory are not protected
from self-programming during program execution when
code protection is enabled.
18.3 Program Write Protection bits (PWP)
In addition to a device Code Protection bit, CP, the
PIC32MX devices also feature Program Write Protection
bits (PWP) to prevent boot Flash and program Flash
memory regions from being written during code
execution.
Boot Flash memory is write-protected with a single
Configuration
bit,
BWP
(DEVCFG0<24>),
when
programmed to ‘0’.
Program Flash memory can be write-protected entirely
or in selectable page sizes using Configuration bits
PWP<7:0> (BCFG0<19:12>). A page of program Flash
memory is 4096 bytes (1024 words) or 1024 bytes (256
words). The PWP bits represent the 1’s complement of
the
number
of
protected
pages.
For
example,
programming PWP bits = 0xFF selects 0 pages to be
write-protected, effectively disabling the program Flash
write protection. Programming PWP bits = 0xFE
selects the first page to be write-protected. When
enabled, the write-protected memory range is inclusive
from
the
beginning
of
program
Flash
memory
(0xBD00_0000) up through the selected page.
The amount of program Flash memory available for
write protection depends on the family device variant.
See the “Special Features” chapter in the specific
device data sheet for details.
Note:
Once code protection is enabled (CP = 0),
it can only be disabled (CP = 1) by erasing
the device with the Chip Erase command
(MCHP_ERASE)
using
an
external
programming device. See Section 9.0
Note:
The
PWP
bits
represent
the
1’s
complement of the number of protected
pages.
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