參數(shù)資料
型號: PIC32MX675F256L-80I/BG
廠商: Microchip Technology
文件頁數(shù): 14/64頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 256KB FLASH 121XBGA
特色產(chǎn)品: 32-Bit PIC? Microcontroller
PIC32 32-Bit MCU Families
標(biāo)準(zhǔn)包裝: 184
系列: PIC® 32MX
核心處理器: MIPS32? M4K?
芯體尺寸: 32-位
速度: 80MHz
連通性: 以太網(wǎng),I²C,SPI,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 121-TFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 650 (CN2011-ZH PDF)
2007-2012 Microchip Technology Inc.
DS61145K-page 21
PIC32MX
8.0
CHECK DEVICE STATUS
Before a device can be programmed, the programmer
must check the status of the device to ensure that it is
ready to receive information.
FIGURE 8-1:
CHECK DEVICE STATUS
8.1
4-wire Interface
Four-wire JTAG programming is a Mission mode
operation and therefore the setup sequence to begin
programing should be done while asserting MCLR.
Holding the device in Reset prevents the processor
from executing instructions or driving ports.
The following steps are required to check the device
status using the 4-wire interface:
1.
Set MCLR pin low.
2.
SetMode (6’b011111) to force the Chip TAP
controller into Run Test/Idle state.
3.
SendCommand
(MTAP_SW_MTAP).
4.
SendCommand
(MTAP_COMMAND).
5.
statusVal = XferData (MCHP_STATUS).
6.
If CFGRDY (statusVal<3>) is not ‘1’ and
FCBUSY (statusVal<2>) is not ‘0’ GOTO step 5.
8.2
2-wire Interface
The following steps are required to check the device
status using the 2-wire interface:
1.
SetMode (6’b011111) to force the Chip TAP
controller into Run Test/Idle state.
2.
SendCommand
(MTAP_SW_MTAP).
3.
SendCommand
(MTAP_COMMAND).
4.
statusVal = XferData (MCHP_STATUS).
5.
If CFGRDY (statusVal<3>) is not ‘1’ and
FCBUSY (statusVal<2>) is not ‘0’, GOTO
step 4.
SetMode (6’b011111)
SendCommand
(MTAP_SW_MTAP)
SendCommand
(MTAP_COMMAND)
statusVal = XferData (MCHP_STATUS)
FCBUSY = 0
CFGRDY = 1
No
Set MCLR low
4-wire
Done
Yes
Note:
If using the 4-wire interface, the oscillator
source, as selected by the configuration
words, must be present to access flash
memory. In an unprogrammed device, the
oscillator source is the internal FRC allow-
ing for flash memory access. If the config-
uration words have been reprogrammed
selecting an external oscillator source
then it must be present for flash memory
access. See the “Special Features”
chapter in the specific device data sheet
for details regarding oscillator selection
using the configuration word settings.
Note:
If CFGRDY and FCBUSY do not come to
the proper state within 10 ms, the
sequence may
have
been
executed
incorrectly or the device is damaged.
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