參數(shù)資料
型號: PIP3104
廠商: NXP Semiconductors N.V.
英文描述: PowerMOS transistor Logic level TOPFET
中文描述: PowerMOS晶體管邏輯電平TOPFET
文件頁數(shù): 3/6頁
文件大?。?/td> 32K
代理商: PIP3104
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level TOPFET
PIP3104-P
OUTPUT CHARACTERISTICS
Limits are for -40
C
T
mb
150
C; typicals are for T
mb
= 25
C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Off-state
V
IS
= 0 V
I
D
= 10 mA
I
DM
= 1 A; t
p
300
μ
s;
δ
0.01
V
DS
= 40 V
V
(CL)DSS
Drain-source clamping voltage
50
-
-
V
50
60
70
V
I
DSS
Drain source leakage current
-
-
-
100
10
μ
A
μ
A
T
mb
= 25
C
0.1
On-state
I
DM
= 3 A; t
p
300
μ
s;
δ
0.01
V
IS
4.4 V
R
DS(ON)
Drain-source resistance
-
-
-
190
100
m
m
m
m
T
mb
= 25
C
68
V
IS
4 V
-
-
-
200
105
T
mb
= 25
C
72
OVERLOAD CHARACTERISTICS
-40
C
T
mb
150
C unless otherwise specified.
SYMBOL
PARAMETER
Short circuit load
I
D
Drain current limiting
CONDITIONS
V
DS
= 13 V
V
= 5 V;
4.4 V
V
IS
5.5 V
4 V
V
IS
5.5 V
V
= 5 V;
device trips if P
D
> P
D(TO)
which determines trip time
1
MIN.
TYP.
MAX.
UNIT
T
mb
= 25
C
8
6
5
12
-
-
16
18
18
A
A
A
Overload protection
Overload power threshold
Characteristic time
T
mb
= 25
C
P
D(TO)
T
DSC
20
200
55
350
80
600
W
μ
s
Overtemperature protection
Threshold junction
temperature
2
T
j(TO)
150
170
-
C
1
Trip time t
d sc
varies with overload dissipation P
D
according to the formula t
d sc
T
DSC
/ ln[ P
D
/ P
D(TO)
].
2
This is independent of the dV/dt of input voltage V
IS
.
May 2001
3
Rev 1.000
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