參數(shù)資料
型號(hào): PK20X256VLQ100
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 53/75頁(yè)
文件大?。?/td> 0K
描述: IC ARM CORTEX MCU 256K 144-LQFP
產(chǎn)品培訓(xùn)模塊: Kinetis® Cortex-M4 Microcontroller Family
標(biāo)準(zhǔn)包裝: 1
系列: Kinetis
核心處理器: ARM? Cortex?-M4
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,IrDA,SDHC,SPI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,I²S,LVD,POR,PWM,WDT
輸入/輸出數(shù): 100
程序存儲(chǔ)器容量: 256KB(256K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 33x16b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 144-LQFP
包裝: 托盤
6.8.6 DSPI switching specifications (full voltage range)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Table 42. Master mode DSPI timing (full voltage range)
Num
Description
Min.
Max.
Unit
Notes
Operating voltage
1.71
3.6
V
Frequency of operation
12.5
MHz
DS1
DSPI_SCK output cycle time
4 x tBUS
ns
DS2
DSPI_SCK output high/low time
(tSCK/2) - 4
(tSCK/2) + 4
ns
DS3
DSPI_PCSn valid to DSPI_SCK delay
(tBUS x 2)
4
ns
DS4
DSPI_SCK to DSPI_PCSn invalid delay
(tBUS x 2)
4
ns
DS5
DSPI_SCK to DSPI_SOUT valid
10
ns
DS6
DSPI_SCK to DSPI_SOUT invalid
-4.5
ns
DS7
DSPI_SIN to DSPI_SCK input setup
20.5
ns
DS8
DSPI_SCK to DSPI_SIN input hold
0
ns
1. The DSPI module can operate across the entire operating voltage for the processor, but to run across the full voltage
range the maximum frequency of operation is reduced.
2. The delay is programmable in SPIx_CTARn[PSSCK] and SPIx_CTARn[CSSCK].
3. The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC].
DS3
DS4
DS1
DS2
DS7
DS8
First data
Last data
DS5
First data
Data
Last data
DS6
Data
DSPI_PCSn
DSPI_SCK
(CPOL=0)
DSPI_SIN
DSPI_SOUT
Figure 21. DSPI classic SPI timing — master mode
Table 43. Slave mode DSPI timing (full voltage range)
Num
Description
Min.
Max.
Unit
Operating voltage
1.71
3.6
V
Frequency of operation
6.25
MHz
Table continues on the next page...
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
Freescale Semiconductor, Inc.
57
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