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參數(shù)資料
型號: PK20X256VMD100
廠商: Freescale Semiconductor
文件頁數(shù): 54/75頁
文件大小: 0K
描述: IC ARM CORTEX MCU 256K 144-MAP
產(chǎn)品培訓(xùn)模塊: Kinetis® Cortex-M4 Microcontroller Family
標(biāo)準(zhǔn)包裝: 1
系列: Kinetis
核心處理器: ARM? Cortex?-M4
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,IrDA,SDHC,SPI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,I²S,LVD,POR,PWM,WDT
輸入/輸出數(shù): 100
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 33x16b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 144-LBGA
包裝: 托盤
Table 43. Slave mode DSPI timing (full voltage range) (continued)
Num
Description
Min.
Max.
Unit
DS9
DSPI_SCK input cycle time
8 x tBUS
ns
DS10
DSPI_SCK input high/low time
(tSCK/2) - 4
(tSCK/2) + 4
ns
DS11
DSPI_SCK to DSPI_SOUT valid
20
ns
DS12
DSPI_SCK to DSPI_SOUT invalid
0
ns
DS13
DSPI_SIN to DSPI_SCK input setup
2
ns
DS14
DSPI_SCK to DSPI_SIN input hold
7
ns
DS15
DSPI_SS active to DSPI_SOUT driven
19
ns
DS16
DSPI_SS inactive to DSPI_SOUT not driven
19
ns
First data
Last data
First data
Data
Last data
Data
DS15
DS10
DS9
DS16
DS11
DS12
DS14
DS13
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Figure 22. DSPI classic SPI timing — slave mode
6.8.7 Inter-Integrated Circuit Interface (I2C) timing
Table 44. I 2C timing
Characteristic
Symbol
Standard Mode
Fast Mode
Unit
Minimum
Maximum
Minimum
Maximum
SCL Clock Frequency
fSCL
0
100
0
400
kHz
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated.
tHD; STA
4
0.6
s
LOW period of the SCL clock
tLOW
4.7
1.3
s
HIGH period of the SCL clock
tHIGH
4
0.6
s
Set-up time for a repeated START
condition
tSU; STA
4.7
0.6
s
Data hold time for I2C bus devices
tHD; DAT
01
03
0.91
s
Data set-up time
tSU; DAT
1002, 5
ns
Rise time of SDA and SCL signals
tr
1000
20 +0.1Cb6
300
ns
Table continues on the next page...
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013.
58
Freescale Semiconductor, Inc.
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