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參數(shù)資料
| 型號(hào)： | PLC18V8ZIAN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLD |
| 英文描述： | Zero standby power CMOS versatile PAL devices |
| 中文描述： | OT PLD, 25 ns, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-146-1, DIP-20 |
| 文件頁(yè)數(shù)： | 16/23頁(yè) |
| 文件大?。?/td> | 225K |
| 代理商： | PLC18V8ZIAN |
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VNAME
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CUSTOMER NAME
PURCHASE ORDER #
PHILIPS DEVICE #
CF(XXXX)
CUSTOMER SYMBOLIZED PART #
TOTAL NUMBER OF PARTS
PROGRAM TABLE #
REV.
DATE
NOTES:
In the unprogrammed or virgin state:
All AND gate locations are pulled to a logic “0” (Low).
Output polarity is inverting.
Pins 1 and 11 are configured as inputs 0 and 9, respectively, via
the configuration cell. The clock and OE functions are disabled.
All output macro cells (OMC) are configured as combinatorial I/O,
with the outputs disabled via the direction control term.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PLC18V8Z35A | 20 Characters x 4 Lines, 5x7 Dot Matrix Character and Cursor |
| PLC18V8Z | Zero standby power CMOS versatile PAL devices |
| PLC18V8Z25A | Zero standby power CMOS versatile PAL devices |
| PLC18V8Z25D | Zero standby power CMOS versatile PAL devices |
| PLC18V8Z25DB | Zero standby power CMOS versatile PAL devices |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PLC18V8ZID | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UV-Erasable/OTP PLD |
| PLC18V8ZIDB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Zero standby power CMOS versatile PAL devices |
| PLC18V8ZIDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Zero standby power CMOS versatile PAL devices |
| PLC18V8ZIN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Zero standby power CMOS versatile PAL devices |
| PLC18V8ZZID | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Zero standby power CMOS versatile PAL devices |
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