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參數(shù)資料
| 型號(hào)： | PLDC20G10-30DMB |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | CMOS Generic 24-Pin Reprogrammable Logic Device |
| 中文描述： | OT PLD, 30 ns, CDIP24 |
| 封裝： | 0.300 INCH, CERDIP-24 |
| 文件頁(yè)數(shù)： | 4/14頁(yè) |
| 文件大?。?/td> | 393K |
| 代理商： | PLDC20G10-30DMB |
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PLDC20G10B
PLDC20G10
Document #: 38-03010 Rev. *A
Page 4 of 14
Combinatorial Output Configurations
[2]
Figure 5. Product Term OE/Active LOW
Figure 6. Product Term OE/Active HIGH
Figure 7. Pin 13 OE/Active Low
Figure 8. Pin 13 OE/Active HIGH
Note:
2. Bidirectional I/O configurations are possible only when the combinatorial output option is selected
C
2
= 0
C
1
= 1
C
0
= 0
C
2
= 0
C
1
= 1
C
0
= 1
C
2
= 1
C
1
= 1
C
0
= 0
C
2
= 1
C
1
= 1
C
0
= 1
PIN 13
PIN 13
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| PLDC20G10-30LMB | CMOS Generic 24-Pin Reprogrammable Logic Device |
| PLDC20G10-30WMB | CMOS Generic 24-Pin Reprogrammable Logic Device |
| PLDC20G10-35JC | CMOS Generic 24-Pin Reprogrammable Logic Device |
| PLDC20G10-35PC | CMOS Generic 24-Pin Reprogrammable Logic Device |
| PLDC20G10B-15PC | CMOS Generic 24-Pin Reprogrammable Logic Device |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PLDC20G10-30LMB | 制造商:Cypress Semiconductor 功能描述:SPLD PLDC20G10 Family 400 Gates 10 Macro Cells 31.25MHz 5V 28-Pin LLCC |
| PLDC20G10-30WMB | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CMOS Generic 24-Pin Reprogrammable Logic Device |
| PLDC20G10-35HC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UV-Erasable/OTP PLD |
| PLDC20G10-35JC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CMOS Generic 24-Pin Reprogrammable Logic Device |
| PLDC20G10-35JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UV-Erasable/OTP PLD |
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