參數(shù)資料
型號(hào): PLL1100A
英文描述: PHASE LOCKED LOOP
中文描述: 鎖相環(huán)
文件頁(yè)數(shù): 1/2頁(yè)
文件大?。?/td> 72K
代理商: PLL1100A
100 Hz
1 kHz
10 kHz
100 kHz
-80
-120
-140
-160
-60
-100
PLL1100A
PHASE LOCKED LOOP
Basestations
Mobile Radios
Satellite Communications
5
18
1076
50 KHz
-70
3±2
50
50
HIGH
2.0
-15
8
4
-40 to +85
Frequency Range
RMS Phase Error (100 Hz - 100 KHz)
Harmonic Suppression (2nd, typ.)
Sideband Spurs (typ.)
Switching Speed (typ., adjacent channel)
Startup Lock Time (typ.)
Operating Temperature Range
Package Style
PLL
MHz
°
dBc
dBc
dBm
mSec
mSec
°C
Vdc
mA
Supply Voltage (Vcc, nom.)
Supply Current (Icc, typ.)
All specifications are typical unless otherwise noted and subject to change without notice.
PHASE NOISE (1 Hz BW, typical)
Z-Communications, Inc.
All rights reserved
Page 1
FEATURES
APPLICATIONS
PERFORMANCE SPECIFICATIONS
VALUE
1076
UNITS
POWER SUPPLY REQUIREMENTS
APPLICATION NOTES
MHz
Step Size:
PLL
- Style Package
A1
Rev
AN-107 : How to Solder Z-COMM VCOs / PLLs
AN-200 : Mounting and Grounding of Z-COMM PLLs
AN-201 : PLL Fundamentals AN-202 : PLL Functional Description
NOTES:
Reference Oscillator Signal: 5 MHz<
f
osc
<40 MHz
9939 Via Pasar San Diego, CA 92126
TEL (858) 621-2700 FAX (858) 621-2722
Power Output
Load Impedance
Step Size
KHz
1130
-
Frequency Range:
-
1130
Charge Pump Output Current
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