參數(shù)資料
型號: PLR132
廠商: Electronic Theatre Controls, Inc.
英文描述: Photo-link Light Receiver Unit
中文描述: 圖片鏈接光接收機單元
文件頁數(shù): 7/7頁
文件大?。?/td> 130K
代理商: PLR132
Everlight Electronics Co., Ltd. http://www.everlight.com Rev 1.1
Page: 7 of 7
Device NO.: DPL-832-011 Prepared date: 06-24-2004 Prepared By: Chin-Chia Hsu
PLR132
Application Notes: PLR132 Series PCB layout for motherboard integration
To achieve better jitter and low input optical power performances, several PCB layout
guidelines must be followed. These guidelines ensure the most reliable PLR132 POF performance
for the motherboard integration. Failed to implement these PCB guidelines may affect the PLR132
jitter and low input power performances.
1. Careful decoupling of the power supplies is very important. Place a 0.47uf surface mount (size
805 or smaller) capacitor as close as (less than 2cm) to the POF Vdd and Gnd leads. The 0.47uf
act as a low impedance path to ground for any stray high frequency transient noises.
2. To reduce the digital noises form the digital IC on the motherboard, the planar capacitance
formed by an isolated Vcc and Gnd planes is critical. The POF device must be mounted directly
on these two planes to reduce the lead parasitic inductance.
3. The isolated Vdd and Gnd planes must be connected to the main Vcc and Gnd (digital) planes at
a single point using ferrite beads. The beads are used to block the high frequency noises from
the digital planes while still allowing the DC connections between the planes.
EVERLIGHT ELECTRONICS CO., LTD.
Office: No 25, Lane 76, Sec 3, Chung Yang Rd,
Tucheng, Taipei 236, Taiwan, R.O.C
Fax: 886-2267-6244, 2267-6189, 2267-6306
http://www.everlight.com
Tel: 886-2-2267-2000, 2267-9936
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