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參數(shù)資料
| 型號(hào)： | PLUS153BN |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | PLD |
| 英文描述： | Programmable logic arrays 18 】 42 】 10 |
| 中文描述： | OT PLD, 15 ns, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 72K |
| 代理商： | PLUS153BN |
Philips Semiconductors Programmable Logic Devices
Product specification
PLUS153B/D
Programmable logic arrays
(18
×
42
×
10)
October 22, 1993
14
LOGIC PROGRAMMING
The PLUS153B/D is fully supported by
industry standard (JEDEC compatible) PLD
CAD tools, including Philips Semiconductors
SNAP design software package. ABEL
and
CUPL
design software packages also
support the PLUS153B/D architecture.
All packages allow Boolean and state
equation entry formats. SNAP, ABEL and
CUPL also accept, as input, schematic
capture format.
PLUS153B/D logic designs can also be
generated using the program table entry
format, which is detailed on the following
page. This program table entry format is
supported by SNAP only.
To implement the desired logic functions, the
state of each logic variable from logic
equations (I, B, O, P, etc.) is assigned a
symbol. The symbols for TRUE,
COMPLEMENT, INACTIVE, PRESET, etc.,
are defined below.
PROGRAMMING AND
SOFTWARE SUPPORT
Refer to Section 9
(Development Software)
and Section 10
(Third-Party
Programmer/Software Support)
of this data
handbook for additional information.
AND ARRAY – (I, B)
CODE
O
STATE
INACTIVE
1, 2
CODE
H
STATE
CODE
STATE
I, B
CODE
STATE
I, B
L
–
P, D
I, B
I, B
I, B
P, D
I, B
I, B
I, B
P, D
I, B
I, B
I, B
P, D
I, B
I, B
I, B
DON’T CARE
OR ARRAY – (B)
VIRGIN STATE
A factory shipped virgin device contains all
fusible links intact, such that:
1. All outputs are at “H” polarity.
2. All P
n
terms are disabled.
3. All P
n
terms are active on all outputs.
NOTES:
1. This is the initial unprogrammed state of all links.
2. Any gate P
n
will be unconditionally inhibited if both the true and complement of an input (either
I or B) are left intact.
ABEL is a trademark of Data I/O Corp.
CUPL is a trademark of Logical Devices, Inc.
CODE
ACTIVE LEVEL
LOW
(INVERTING)
L
CODE
ACTIVE LEVEL
HIGH
1
(NON–INVERTING)
H
S
X
B
S
X
B
OUTPUT POLARITY – (B)
CODE
INACTIVE
A
CODE
P
n
STATUS
ACTIVE
1
P
S
P
n
STATUS
P
S
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PLUS153D | Programmable logic arrays 18 】 42 】 10 |
| PLUS153DN | Programmable logic arrays 18 】 42 】 10 |
| PLUS17310 | Programmable logic array 22 】 42 】 10 |
| PLUS17310A | Programmable logic array 22 】 42 】 10 |
| PLUS17310N | Programmable logic array 22 】 42 】 10 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PLUS153D | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Programmable logic arrays 18 】 42 】 10 |
| PLUS153DA | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Programmable logic arrays 18 】 42 】 10 |
| PLUS153DF | 制造商:North American Philips Discrete Products Div 功能描述:153DF |
| PLUS153DN | 制造商:NXP Semiconductors 功能描述:Simple, Programmable Logic Array, 20 Pin, Plastic, DIP |
| PLUS16L8 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:PAL devices |
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