
Device description
PM6675S
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7.1.9
Gate drivers
The integrated high-current gate drivers allow using different power MOSFETs. The high-
side driver uses a bootstrap circuit which is supplied by the +5 V rail. The BOOT and
PHASE pins work respectively as supply and return path for the high-side driver, while the
low-side driver is directly fed through VCC and PGND pins.
An important feature of the PM6675S gate drivers is the Adaptive Anti-Cross-Conduction
circuitry, which prevents high-side and low-side MOSFETs from being turned on at the same
time. When the high-side MOSFET is turned off, the voltage at the PHASE node begins to
fall. The low-side MOSFET is turned on only when the voltage at the PHASE node reaches
an internal threshold (2.5 V typ.). Similarly, when the low-side MOSFET is turned off, the
high-side one remains off until the LGATE pin voltage is above 1 V.
The power dissipation of the drivers is a function of the total gate charge of the external
power MOSFETs and the switching frequency, as shown in the following equation:
Equation 22
The low-side driver has been designed to have a low-resistance pull-down transistor
(0.6
typ.) in order to prevent undesired start-up of the low-side MOSFET due to the Miller
effect.
7.1.10
Reference voltage and bandgap
The 1.237 V internal bandgap reference has a granted accuracy of ±1 % over the 0 °C to
85 °C temperature range. The VREF pin is a buffered replica of the bandgap voltage. It can
supply up to ±100
A and is suitable to set the intermediate level of NOSKIP multifunction
pin. A 100 nF (min.) bypass capacitor toward SGND is required to enhance noise rejection.
If VREF falls below 0.8 V (typ.), the system detects a fault condition and all the circuitry is
turned off.
An internal divider derives a 0.6 V ± 1 % voltage (Vr) from the bandgap. This voltage is used
as reference for both the switching and the linear sections. The Over-Voltage Protection, the
Under-Voltage Protection and the power-good signals are also referred to Vr.
7.1.11
Switching section OV and UV protections
When the switching output voltage is about 115 % of its nominal value, a latched Over-
Voltage Protection (OVP) occurs. In this case the synchronous rectifier immediately turns on
while the high-side MOSFET turns off. The output capacitor is rapidly discharged and the
load is preserved from being damaged. The OVP is also active during the soft-start. Once
an OVP has taken part, a toggle on SWEN pin or a Power-On-Reset is necessary to exit
from the latched state.
When the switching output voltage is below 70 % of its nominal value, a latched Under-
Voltage Protection occurs. This event causes the switching section to be immediately
disabled and both switches to be opened. The controller performs a soft-end and the output
is eventually kept to ground, turning the low side MOSFET on when the voltage is lower than
400 mV.
The Under-Voltage Protection circuit is enabled only at the end of the soft-start. Once an
UVP has taken part, a toggle on SWEN pin or a Power-On-Reset is necessary to clear the
fault state and restart the section.
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