參數(shù)資料
型號(hào): PM8611
廠商: PMC-Sierra, Inc.
英文描述: SBSLITE⑩ Telecom Standard Product Data Sheet Preliminary
中文描述: SBSLITE⑩電信標(biāo)準(zhǔn)產(chǎn)品數(shù)據(jù)的初步
文件頁(yè)數(shù): 65/292頁(yè)
文件大小: 1585K
代理商: PM8611
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SBSLITE Telecom Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
64
The data transferred between the end points has no fixed format, effectively providing a clear
channel for packet transfer between the attached microprocessors at each of the LVDS link
terminating devices. Using the microprocessor interface, the user is able to send and receive any
packet up to 32 bytes in length. The first two bytes of each 36 byte message contains a header and
the last two bytes of the message is a CRC-16 which detects errors in the message.
This in-band channel is expected to be used almost entirely to carry out switching control changes
in the SBSLITEs. To configure a DS0 in an SBSLITE device most often requires a local
microprocessor to write to one memory location consisting of a 16-bit address and a 16-bit data.
Using this as a baseline and assuming an efficient use of the in-band channel bandwidth we can
set a maximum of (32bytes/row * 4 rows/frame * 8000 frames/sec / 4 bytes/write) 256,000 DS0
configurations per second.
Considering that configuring a T1 when switching DS0s requires 27 DS0 writes indicates that the
in-band signaling channel bandwidth sets maximum limit of over 9000 T1 configurations per
second. In real life these limits will not be achieved but this shows that the in-band link should
not be the bottleneck. In TelecomBus mode this same configuration will require only 3 writes per
T1 link.
In N+1 protected architectures it is likely that full configuration of a port card will be necessary
during the switchover. This would require the entire connection memory be reconfigured.
Assuming connections for overhead bytes are also reconfigured, the fastest that a complete
reconfiguration can take place is 9720 register writes which equates to (9720 writes * 4
bytes/write / (32 bytes/row * 4 rows/frame * 8000 frames/second)) 38 milliseconds. It is also
possible that the spare card could hold all the connection configurations for all the port cards it is
protecting locally, for even faster switch over.
10.18.1 In-Band Signaling Channel Fixed Overhead
The In-Band Link Controller block generates and terminates two bytes of fixed header and a
CRC-16 per every 36 byte in-band message. The two byte header provides control and status
between devices at the ends of the LVDS link. The CRC-16 is calculated over the entire 34 byte
in-band message and provides the terminating end the ability to detect errors in the in-band
message. The format of the in-band message and header bytes is shown in Figure 10 and Figure
11.
Figure 10 In-Band Signaling Channel Message Format
1 byte
1 byte
32 bytes
2 bytes
Header1
Header2
Free Format Information
CRC-16
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