參數(shù)資料
型號(hào): PMS430E112
英文描述: 16-Bit Ultra-Low-Power Microcontroller. 4kB EPROM. 256B RAM
中文描述: 16位超低功耗微控制器。 4kB的存儲(chǔ)器。 256B的RAM
文件頁(yè)數(shù): 20/29頁(yè)
文件大?。?/td> 411K
代理商: PMS430E112
MSP430x11x
MIXED SIGNAL MICROCONTROLLERS
SLAS196C
DECEMBER 1998
REVISED MARCH 2003
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
input/output schematic
Port P1, P1.0 to P1.3, input/output with Schmitt-trigger
EN
D
(See Note 1)
(See Note 2)
(See Note 2)
(See Note 1)
GND
VCC
P1.0
P1.3
0
1
0
1
Interrupt
Edge
Select
EN
Set
Q
P1IE.x
P1IFG.x
P1IRQ.x
Interrupt
Flag
P1IES.x
P1SEL.x
Module X IN
P1IN.x
P1OUT.x
Module X OUT
Direction Control
From Module
P1DIR.x
P1SEL.x
Pad Logic
NOTE: x = Bit Identifier, 0 to 3 For Port P1
PnSel.x
PnDIR.x
Dir. Control
from module
PnOUT.x
Module X
OUT
PnIN.x
Module X
IN
TACLK
CCI0A
CCI1A
CCI2A
PnIE.x
PnIFG.x
PnIES.x
P1Sel.0
P1DIR.0
P1DIR.0
P1OUT.0
VSS
P1IN.0
P1IE.0
P1IFG.0
P1IES.0
P1Sel.1
P1DIR.1
P1DIR.1
P1OUT.1
Out0 signal
Out1 signal
Out2 signal
P1IN.1
P1IE.1
P1IFG.1
P1IES.1
P1Sel.2
P1DIR.2
P1DIR.2
P1OUT.2
P1IN.2
P1IE.2
P1IFG.2
P1IES.2
P1Sel.3
Signal from or to Timer_A
NOTES:
1. Optional selection of pullup or pulldown resistors with ROM (masked) versions.
2. Fuses for optional pullup and pulldown resistors can only be programmed at the factory.
P1DIR.3
P1DIR.3
P1OUT.3
P1IN.3
P1IE.3
P1IFG.3
P1IES.3
CMOS INPUT (RST/NMI)
VCC
(see Note 1)
(see Note 1)
GND
(see Note 2)
(see Note 2)
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