參數(shù)資料
型號: PQ55530HEB08PRA-G
廠商: SYNQOR INC
元件分類: 電源模塊
英文描述: 1-OUTPUT 400 W DC-DC REG PWR SUPPLY MODULE
封裝: ROHS COMPLIANT, HALF-BRICK PACKAGE-8
文件頁數(shù): 4/14頁
文件大?。?/td> 630K
代理商: PQ55530HEB08PRA-G
Product # PQ55530HEB08
Phone 1-888-567-9596
Doc.# 005-2HEB53P Rev. B
10/4/07
Page 12
T
Technical S
echnical Specification
pecification
Input:
Output:
Current:
PPackage:
ackage:
38-55 V
53 V
7.6 A
Half-brick
APPLICATION CONSIDERATIONS
Input System Instability: This condition can occur because
any DC/DC converter appears incrementally as a negative
resistance load. A detailed application note titled “Input
System Instability” is available on the SynQor website which
provides an understanding of why this instability arises, and
shows the preferred solution for correcting it.
Application Circuits: Figure C provides a typical circuit dia-
gram which details the input filtering and voltage trimming.
Input Filtering and External Capacitance: Figure D pro-
vides a diagram showing the internal input filter components.
This filter dramatically reduces input terminal ripple current,
which otherwise could exceed the rating of an external elec-
trolytic input capacitor. The recommended external input capac-
itance is specified in the “Input Characteristics” section. More
detailed information is available in the application note titled
Startup Inhibit Period: The Startup Inhibit Period ensures that
the converter will remain off for approximately 6ms when it is
shut down for any reason. In all, there are three ways that the
converter can be shut down, initiating a Startup Inhibit Period:
Input Under-Voltage Lockout
Over Temperature Shutdown
Turned off by the ON/OFF input
Figure E shows three turn-on scenarios, where a Startup Inhibit
Period is initiated at t0, t1, and t2:
Before time t0, when the input voltage is below the UVL threshold,
the unit is disabled by the Input Under-Voltage Lockout feature.
When the input voltage rises above the UVL threshold, the Input
Under-Voltage Lockout is released, and a Startup Inhibit Period is
initiated. At the end of this delay, the ON/OFF pin is evaluated,
and since it is active, the unit turns on.
At time t1, the unit is disabled by the ON/OFF pin, and it cannot
be enabled again until the Startup Inhibit Period has elapsed.
If the input voltage quickly rises over UVLO at t3, the output start-
up time is 12ms.
Vin
External
Input
Filter
Trim
Vin(+)
Iload
Cload
L
C
Vout(+)
Rtrim-up
or
Rtrim-down
Vsense(+)
ON/OFF
Vin(_)
Vin(+)
Vin(_)
Vout(_)
Vsense(_)
Electrolytic
Capacitor
100F
Figure C: Typical application circuit (negative logic unit, permanently enabled).
Figure D: Internal Input Filter Diagram (component values listed on page 4).
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