參數(shù)資料
型號: PS21204
廠商: Mitsubishi Electric Corporation
英文描述: TRANSFER-MOLD TYPE INSULATED TYPE
中文描述: 轉(zhuǎn)讓模具類型絕緣型
文件頁數(shù): 6/8頁
文件大小: 187K
代理商: PS21204
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21204
TRANSFER-MOLD TYPE
INSULATED TYPE
Aug. 1999
Fig. 5 TIMING CHARTS OF THE DIP-IPM PROTECTIVE FUNCTIONS
[A] Short-Circuit Protection (Lower-arms only)
(For the external shunt resistance and CR connection, please refer to Fig. 3.)
a1. Normal operation : IGBT ON and carrying current.
a2. Short circuit current detection (SC trigger).
a3. Hard IGBT gate interrupt.
a4. IGBT turns OFF.
a5. F
O
timer operation starts : The pulse width of the F
O
signal is set by the external capacitor C
FO
.
a6. Input “H” : IGBT OFF state.
a7. Input “L” : IGBT ON state, but during the F
O
active signal the IGBT doesn’t turn ON.
a8. IGBT OFF state.
[B] Under-Voltage Protection (N-side, UV
D
)
a1. Normal operation : IGBT ON and carrying current.
a2. Under voltage trip (UV
Dt
).
a3. IGBT OFF inspite of control input condition.
a4. F
O
timer operation starts : The pulse width of the F
O
signal is set by the external capacitor C
FO
.
a5. Under voltage reset (UV
Dr
).
a6. Normal operation : IGBT ON and carrying current.
Note :
The CR time constant safe guards against erroneous SC fault signals resulting from di/dt generated voltages when the IGBT turns ON.
The optimum setting for the CR circuit time constant is 1.5~2.0
μ
s.
Error output Fo
Sense voltage of the
shunt resistance
SC reference voltage
CR circuit time constant DELAY (*Note)
Output current Ic(A)
Internal IGBT gate
Protection circuit state
Lower-arms control input
a5
a8
a4
a3
a1
a2
SC
RESET
SET
a7
a6
Error output Fo (N-side only)
Output current Ic(A)
Control supply voltage V
D
Protection circuit state
Control input
a6
a1
a3
a5
a2
RESET
UV
Dt
UV
Dr
SET
a4
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