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| 型號(hào)： | PSD314R |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯,無(wú)SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| 中文描述： | 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，無(wú)的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有16個(gè)輸入） |
| 文件頁(yè)數(shù)： | 4/127頁(yè) |
| 文件大小： | 682K |
| 代理商： | PSD314R |
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PSD3XX Famly
2-4
Product
Description
The PSD3XX family integrates high performance user-configurable blocks of EPROM,
SRAM, and programmable logic. The major functional blocks include two programmable
logic arrays, PAD A and PAD B, 256K to 2Mbit of EPROM, 16K bits of SRAM (no SRAM on
PSD3XXR versions), input latches, and output ports. The PSD3XX family is ideal for
applications requiring low power and very small form factors. These include hard disk
control, modems, cellular telephones, instrumentation, computer peripherals, military and
similar applications.
The PSD3XX family offers a unique single-chip solution for microcontrollers that need:
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I/O reconstruction (microcontrollers lose at least two I/O ports when accessing
external resources).
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More EPROM and SRAM than the microcontroller’s internal memory.
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3.3 volt system operation (PSD3XXL versions).
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Chip-select, control, or latched address lines that are otherwise implemented discretely.
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An interface to shared external resources.
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Expanded microcontroller address space.
WSI’s PSD3XX Family Architecture (Figure 1) can efficiently interface with, and enhance,
any low-voltage 8- or 16-bit microcontroller system. This is the first solution that provides
microcontrollers with port expansion, latched addresses, page logic, two programmable
logic arrays (PAD A and PAD B), an interface to shared resources, 256K, 512K, 1M, or
2Mbit EPROM, and 16K bit SRAM on a single chip. The PSD3XX family does not require
any glue logic for interfacing to any 8- or 16-bit microcontroller.
The 8051 microcontroller family can take full advantage of the PSD3XX’s separate program
and data address spaces. Users of the 68HCXX microcontroller family can change the
functionality of the control signals and directly connect the R/W and E, or the R/W and DS
signals. (Users of 16-bit microcontrollers, including the 80186, 8096, 80196 and 16XXX,
can use the PSD301/302/303 in a 16-bit configuration). Address and data buses can be
configured as separate or multiplexed, whichever is required by the host processor.
The flexibility of the PSD3XX I/O ports permits interfacing to shared resources. The
arbitration can be controlled internally by PAD A outputs. The user can assign the following
functions to these ports: standard I/O pins, chip-select outputs from PAD A and PAD B, or
latched address or multiplexed low-order address/data byte. This enables users to design
add-on systems such as disk drives, modems, etc., that easily interface to the host bus
(e.g., IBM PC, SCSI).
The page register extends the accessible address space of certain microcontrollers from
64 K to 1 M. There are 16 pages that can serve as base address inputs to the PAD, thereby
enlarging the address space of 16 address line microcontrollers by a factor of 16.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD302L | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD303R | Field Programmable Microcontroller Peripherals(可編程邏輯,無(wú)SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD304RL | Field Programmable Microcontroller Peripherals(可編程邏輯,無(wú)SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD312L | Field Programmable Microcontroller Peripherals(可編程邏輯,16K位SRAM,4位頁(yè)寄存器,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
| PSD312R | Field Programmable Microcontroller Peripherals(可編程邏輯,無(wú)SRAM,4位頁(yè)寄存器,19個(gè)可編程I/O,通用PLD有16個(gè)輸入) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD314R-12J | 制造商:WSI 功能描述: |
| PSD314R-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD314R-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD314R-12LM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD314R-12Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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