參數(shù)資料
型號: PSD401A1-20LM
英文描述: Field-Programmable Peripheral
中文描述: 現(xiàn)場可編程外圍
文件頁數(shù): 75/123頁
文件大小: 657K
代理商: PSD401A1-20LM
PSD4XX Famly
72
10.0
Page
Register
The PSD4XX has a programmable security bit which offers protection from unauthorized
duplication. When the security bit is set, the contents of the EPROM, the PSD4XX
non-volatile configuration bits and ZPLD data cannot be read by EPROM programmers.
The security bit is set through the PSDsoft Software and is embedded in the compiled
output file. The security bit is UV erasable and a secured part can be erased and then
re-programmed.
11.0
Security
Protection
Figure 35. Page Register
DPLD
RS0
GPLD
ZPLD
ES0 – 3
PGR0
PGR1
PGR2
PGR3
R/W
D0
D0 – D3
D1
D2
D3
Q0
Q1
Q2
Q3
PAGE
REG.
RESET
The Page Register is 4 bits wide and consists of four D flip flops.The outputs of the Register
(PGR0 – PGR3) are connected to the input bus of the ZPLD. By including the four outputs
as inputs to the DPLD, the addressing capability of the microcontroller is increased by a
factor of 16.
Figure 37 shows the Page Register block diagram. Inputs to the four flip flops are connected
to data bus D0-D3. The output of the Register can be read by the microcontroller. The
Register can operate as an independent register to the microcontroller if page mode is not
implemented.
相關(guān)PDF資料
PDF描述
PSD401A1-20U Field-Programmable Peripheral
PSD401A1-20UI Field-Programmable Peripheral
PSD401A1-70J Field-Programmable Peripheral
PSD401A1-70U Field-Programmable Peripheral
PSD401A1-90J Field-Programmable Peripheral
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD401A1-20U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD401A1-20UI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD401A1-70J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD401A1-70U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD401A1-90J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral