參數(shù)資料
型號(hào): PSD401A1-20U
英文描述: Field-Programmable Peripheral
中文描述: 現(xiàn)場(chǎng)可編程外圍
文件頁數(shù): 96/123頁
文件大?。?/td> 657K
代理商: PSD401A1-20U
PSD4XX Famly
93
-20
-25
ZPLD_TURBO
OFF
Symbol
Parameter
Conditions
Min
Max Min Max
Unit
t
AVQV (PA)
t
SLQV (PA)
t
RLQV (PA)
t
DVQV (PA)
t
QXRH (PA)
t
RLRH (PA)
t
RHQZ (PA)
Address Valid to Data Valid
(Note 3)
95
120
Add 20
ns
CS Valid to Data Valid
100
120
Add 20
ns
RD to Data Valid
(Notes 1 and 4)
50
90
0
ns
Data In to Data Out Valid
35
50
0
ns
RD Data Hold Time
(Note 1)
0
0
0
ns
RD Pulse Width
(Note 1)
40
70
0
ns
RD to Data High-Z
(Note 1)
35
60
0
ns
-20
-25
ZPLD_TURBO
OFF
Symbol
Parameter
Conditions
Min Max Min Max
Unit
t
WLQV (PA)
WR to Data Propagation Delay
(Note 2)
60
60
0
ns
t
DVQV (PA)
Data to Port A Data
Propagation Delay
(Note 5)
40
50
0
ns
t
WHQZ (PA)
WR Invalid to Port A Tri-state
(Note 2)
35
60
0
ns
Port A Peripheral Data Mode Read Timng
(3.0 V ± 10%)
Port A Peripheral Data Mode Write Timng
(3.0 V ± 10%)
Microcontroller Interface – AC/DC Parameters (ZPSD4XXV Versions)
(3.0 V ± 10%)
NOTES:
1. RD timing has the same timing as PSEN, DS, LDS, UDS signals.
2. WR timing has the same timing as E, DS, LDS, UDS, WRL, WRH signals.
3. Any input used to select Port A Data Peripheral Mode.
4. Data is already stable on Port A.
5. Data stable on ADIO pins to data on Port A.
相關(guān)PDF資料
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PSD401A1-20UI Field-Programmable Peripheral
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PSD401A1-70U Field-Programmable Peripheral
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PSD401A1-20UI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
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