參數(shù)資料
型號: PSD402A1-15UI
英文描述: Hi-Rel Adjustable Voltage 3-Terminal Negative Regulator; A OM1322SMM with Standard Packaging
中文描述: 現(xiàn)場可編程外圍
文件頁數(shù): 37/123頁
文件大?。?/td> 657K
代理商: PSD402A1-15UI
PSD4XX Famly
34
9.1.2.6 The ZPLDPower Management
The ZPLD implements a Zero Power Mode, which provides considerable power savings
for low to medium frequency operations. To enable this feature, the ZPLD Turbo bit in the
Power Management Mode Register 0 (PMMR0) has to be turned off.
If none of the inputs to the ZPLD are switching for a time period of 70ns, the ZPLD puts
itself into Zero Power Mode and the current consumption is minimal. The ZPLD will resume
normal operation as soon as one or more of the inputs change state.
Two other features of the ZPLD provide additional power savings:
1. Clock Disable:
Users can disable the clock input to the ZPLD and/or macrocells,
thereby reducing AC power consumption.
2. Product Term Disable:
Unused product terms in the ZPLD are disabled by the PSDsoft Software automatically
for further power savings.
The ZPLD power configuration is described in the Power Management Unit section.
The PSD4XX
Architecture
(cont.)
相關(guān)PDF資料
PDF描述
PSD402A1-20J Field-Programmable Peripheral
PSD402A1-20JI 30V Hi-Rel Synchronous Rectifier N-Channel MOSFET in a SMD-2 package; A IRHSNA57Z60 with Standard Packaging
PSD402A1-20LI -100V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a 18-pin LCC package; Similar to IRHE9130 with optional Total Dose Rating of 300kRads
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD402A1-20J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD402A1-20JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD402A1-20LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD402A1-20LM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD402A1-20U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral