參數(shù)資料
型號: PSD402A2-90U
英文描述: -100V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a 18-pin LCC package; Similar to IRHE9110 with optional total dose rating of 300kRads (si)
中文描述: 現(xiàn)場可編程外圍
文件頁數(shù): 25/123頁
文件大?。?/td> 657K
代理商: PSD402A2-90U
PSD4XX Famly
22
The PSD4XX
Architecture
(cont.)
9.1.2 The PSD4XXA2 ZPLDBlock
Key Features
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2 Embedded ZPLD devices
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24 macrocells
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Combinatorial/registered outputs
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Maximum 126 product terms
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Programmable output polarity
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User configured register clear/preset
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User configured register clock input
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59 Inputs
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Accessible via 24 I/O pins
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Power Saving Mode
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UV-Erasable
General Description
The ZPLD block has 2 embedded PLD devices:
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DPLD
The Address Decoding PLD, generating select signals to internal I/O or memory blocks.
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GPLD
The General Purpose PLD provides 24 programmable macrocells for general
or complex logic implementation; dedicated to user application.
Figure 11 shows the architecture of the ZPLD. The PLD devices all share the same
input bus. The true or complement of the 59 input signals are fed to the programmable
AND-ARRAY. Names and source of the input signals are shown in Table 4. The PA, PB, PE
signals, depending on user configuration, can either be macrocell feedbacks or inputs from
Port A, B or E.
相關PDF資料
PDF描述
PSD403A1 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA package; Similar to IRHM7250 with optional Total Dose Rating of 300kRads
PSD403A1-12J 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA package; A IRHM7250 with Standard Packaging
PSD403A1-12JI Field-Programmable Peripheral
PSD403A1-12LI Field-Programmable Peripheral
PSD403A1-12U 60V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHLNA77064 with Optional Total Dose Rating of 300kRads
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