參數(shù)資料
型號: PSD403A1
英文描述: 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA package; Similar to IRHM7250 with optional Total Dose Rating of 300kRads
中文描述: PSD4XX/ZPSD4XX家庭領域,可編程微控制器外設
文件頁數(shù): 71/123頁
文件大?。?/td> 657K
代理商: PSD403A1
PSD4XX Famly
68
CLR
CLK
APD
COUNTER
APD CLK
PMMR1 - BIT 0
TO OTHER
CIRCUITS
MUX
APD
CLEAR
LOGIC
APD ENABLE
PMMR0 - BIT 2
ALE POLARITY
PMMR0 - BIT 1
ALE
RESET
APD CLK
CLKIN
CSI
SLEEP–ENABLE
PMMR1 - BIT 1
SLEEP
MODE
EPROM
SELECT
SRAM
SELECT
I/O
SELECT
POWER
DOWN
PD
Z
P
L
D
Figure 36. Power Management Unit
Figure 36a. Automatic Power Down Unit (APD) Flow Chart
APD DISABLED
NEED
APD CLK
YES
YES
NO
NO
RESET
SET APD CLK IN PMMR1 BIT 0
SET ALE PD POLARITY
IN PMMRO BIT 1
CSI = "1"
NEED
SLEEP
MODE
SET SLEEP MODE IN PMMR1 BIT 1
ALE IDLE and
15 APD CLOCK
ALE IDLE and
15 APD CLOCK
SET ENABLE APD IN PMMR0 BIT 2
SET PMMR0 BIT 0
SET ENABLE APD IN PMMR0 BIT 2
SET PMMR0 BIT 0
DISABLE CLOCKS
ZPLD ACLK, ZPLD RCLK, TMR ZPLD
DISABLE CLOCKS
ZPLD ACLK, ZPLD RCLK, TMR ZPLD
PSD IN POWER DOWN MODE
PSD IN SLEEP MODE
The PSD4XX
Architecture
(cont.)
相關PDF資料
PDF描述
PSD403A1-12J 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA package; A IRHM7250 with Standard Packaging
PSD403A1-12JI Field-Programmable Peripheral
PSD403A1-12LI Field-Programmable Peripheral
PSD403A1-12U 60V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-2 package; Similar to IRHLNA77064 with Optional Total Dose Rating of 300kRads
PSD403A1-12UI 30V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-254AA package; Similar to IRHMB57Z60 with optional Total Dose Rating of 300kRads
相關代理商/技術參數(shù)
參數(shù)描述
PSD403A1-12J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD403A1-12JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD403A1-12LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD403A1-12U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD403A1-12UI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral