- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄368150 > PSD411A1-15J Field-Programmable Peripheral PDF資料下載
參數(shù)資料
| 型號(hào)： | PSD411A1-15J |
| 英文描述： | Field-Programmable Peripheral |
| 中文描述： | 現(xiàn)場(chǎng)可編程外圍 |
| 文件頁(yè)數(shù)： | 41/123頁(yè) |
| 文件大?。?/td> | 657K |
| 代理商： | PSD411A1-15J |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)當(dāng)前第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)
PSD4XX Famly
38
Pin
Pin
Pin
Pin
Pin
Pin Name
Function
1
RD
Function
2
E
Function
3
DS
Function
4
LDS
Function
5
RD
WR
WR
R/W
WRL
PE0
BHE
PSEN
WRH
UDS
SIZ0
PE1
ALE
AD0
A0
BLE
Table 6. Alternate Pin Functions
9.2.2 PSD4XX Interface To a Multiplexed Bus
Figure 20 shows a typical connection to a microcontroller with a multiplexed bus. The
ADIO port of the PSD4XX is connected directly to the microcontroller address/data bus
(AD0-AD15 for 16 bit bus). The ALE input signal latches the address lines internally. In a
read bus cycle, data is driven out through the ADIO Port transceivers after the specified
access time. The internal ADIO Port connection for a 16 bit multiplexed bus is shown in
Figure 21. The ADIO Port is in tri-state mode if none of the PSD4XX internal devices are
selected.
9.2.3 PSD4XX Interface To Non-Multiplexed Bus
Figure 22 shows a PSD4XX interfacing to a microcontroller with a non-multiplexed
address/data bus. The address bus is connected to the ADIO Port, and the data bus is
connected to Port C and/or Port D, depending on the bus width. There is no need for the
ADIO Port to latch the address internally, but the user is offered the option to do so in the
PSD4XX PSDsoft Software. The data Ports are in tri-state mode when the PSD4XX is not
accessed by the microcontroller.
The PSD4XX
Architecture
(cont.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD411A1-15JI | 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-204AA package; A IRH7130 with Standard Packaging |
| PSD411A1-15LI | -60V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a SMD-0.5 package; Similar to IRHNJ597034 with optional Total Dose Rating of 300kRads |
| PSD411A1-15U | 400V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a TO-205AF package; A IRHF7310SE with Standard Packaging |
| PSD411A1-15UI | 250V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a TO-205AF package; JANS Certified Part Number |
| PSD411A1-20J | 250V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a SMD-2 package; JANS Certified device. Equivalent to IR Part Number IRHNA57264SE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD411A1-15JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD411A1-15LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD411A1-15U | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD411A1-15UI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD411A1-20J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。