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參數(shù)資料
| 型號： | PSD4135G3V-A-70B81I |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| 中文描述： | Flash在系統(tǒng)可編程外設(shè)的16位微控制器 |
| 文件頁數(shù)： | 17/93頁 |
| 文件大?。?/td> | 503K |
| 代理商： | PSD4135G3V-A-70B81I |
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PSD4000 Series
Preliminary Information
14
8.0
Register Bit
Definition
(cont.)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
*
*
*
FL_data
Boot_data
FL_code
Boot_code
SR_code
VM Register
Bit definitions:
Bit 0 0 = PSEN can’t access SRAM in 80C51XA modes.
1 = PSEN can access SRAM in 80C51XA modes.
Bit 1 0 = PSEN can’t access Boot in 80C51XA modes.
1 = PSEN can access Boot in 80C51XA modes.
Bit 2 0 = PSEN can’t access main Flash in 80C51XA modes.
1 = PSEN can access main Flash in 80C51XA modes.
Bit 3 0 = RD can’t access Boot in 80C51XA modes.
1 = RD can access Boot in 80C51XA modes.
Bit 4 0 = RD can’t access main Flash in 80C51XA modes.
1 = RD can access main Flash in 80C51XA modes.
Note:
Upon reset, Bit1-Bit4 are loaded to configurations selected by the user in PSDsoft. Bit 0 is always cleared
by reset. Bit 0 to Bit 4 are active only when the device is configured in Philips 80C51XA mode. Not used
bit should be set to zero.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
S_size 3
S_size 2
S_size 1
S_size 0
F_size 3
F_size 2
F_size 1
F_size 0
Memory_ID0 Register
Bit definitions:
F_size[3:0] = 4h, main Flash size is 2M bit.
F_size[3:0] = 5h, main Flash size is 8M bit.
S_size[3:0] = 0h, SRAM size is 0K bit.
S_size[3:0] = 1h, SRAM size is 16K bit.
S_size[3:0] = 3h, SRAM size is 64K bit.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
*
*
B_type 1
B_type 0
B_size 3
B_size 2
B_size 1
B_size 0
Memory_ID1 Register
Bit definitions:
B_size[3:0] = 0h, Boot block size is 0K bit.
B_size[3:0] = 2h, Boot block size is 256K bit.
B_type[1:0] = 0h, Boot block is Flash memory.
*
Not used bit should be set to zero.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD4135G3V-A-70J | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70JI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70M | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70MI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70U | Ceramic Commercial-Off-The-Shelf Surface Mount Capacitors (COTS); Capacitance [nom]: 0.1uF; Working Voltage (Vdc)[max]: 50V; Capacitance Tolerance: +/-10%; Dielectric: Multilayer Ceramic; Temperature Coefficient: X7R; Lead Style: Surface Mount Chip; Lead Dimensions: 1812; Termination: Tin (Sn) Plated Nickel Barrier; Body Dimensions: 0.177" x 0.126"; Container: Bulk; Features: MIL-PRF-55681; Unmarked |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD4135G3V-A-70J | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70JI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70M | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70MI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4135G3V-A-70U | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System-Programmable Peripherals for 16-Bit MCUs |
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