參數(shù)資料
型號(hào)： PSD413A2-15J
英文描述： Field-Programmable Peripheral
中文描述： 現(xiàn)場(chǎng)可編程外圍
文件頁數(shù)： 9/123頁
文件大小： 657K
代理商： PSD413A2-15J
PSD4XX Famly
6
Figure 3. PSDsoft Development Tools
PSDsilos III
SILOSIII
CHIP SIMULATION
PSD Programmer
PSDpro/MagicPro
CHIP PROGRAMMING
PSD Compiler
(ZPLD FITTING, ADDRESS TRANSLATION)
PSDabel
ZPLD DESCRIPTION
(STATE MACHINE, DECODING)
PSDsoft
Development Software
PSD Configuration
CHIP CONFIGURATION
THIRD PARTY
PROGRAMMERS
CODE FILE
Shown in Figure 3 (below) is the software design flow for a PSD4XX device.
PSDsoft—
ST
’s software development suite—is used throughout the design phase. You
start with a design file that is written in PSDabel—a high-level hardware description
language (HDL). Before you compile your design, you must also configure the PSD4XX so
it knows what signals to expect from your microprocessor and what pre-runtime options
should be set (such as the security bit).
Once you have a design file and have configured the device, you are ready to run the Fitter
and Address Translator. The Fitter accepts input from PSDabel and PSD Configuration,
synthesizes this user logic and configuration, and fits the design to the PSD silicon. The
Address Translator process allows the user to map the MCU firmware from a cross-
compiler (in Intel HEX or S-Record format) into the NVM memory blocks within the PSD. As
a result, the MCU firmware is merged with the logic and configuration definition of the PSD.
The output of the Address Translator and the Fitter is the required object file that is used by
a programmer to program the PSD device. The object file includes chip configuration, the
PLD fusemap, and MCU firmware information.
PSDsilosIII is an optional program that provides functional chip-level simulation of the
PSD4XX. PSDsoft automatically creates files for input to the simulator. These files convey
relevant design information to the simulator. As a result, the user only has to create a
stimulus file since all of the signals and node names are taken from the design file.
6.0
Design Flow
相關(guān)PDF資料
PDF描述
PSD413A2-15JI 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-3 package; Similar to IRHNB7160 with optional Total Dose Rating of 300kRads
PSD413A2-15LI 100V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a SMD-3 package; A IRHNB7160 with Standard Packaging
PSD413A2-15U 600V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a TO-254AA package; Similar to IRHM7C50SE with optional Total Dose Rating of 50kRads
PSD413A2-15UI 600V 100kRad Hi-Rel Single N-Channel SEE Hardened MOSFET in a TO-254AA package; A IRHM7C50SE with Standard Packaging
PSD413A2-20J -200V 100kRad Hi-Rel Single P-Channel TID Hardened MOSFET in a SMD-1 package; Similar to IRHN9250 with optional Total Dose Rating of 300kRads
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD413A2-C-70L 制造商:WSI 功能描述:
PSD4-16 制造商:Tamura Corporation of America 功能描述:
PSD4-20 制造商:MICROTRAN 功能描述:POWER TRANSFORMER, 6 VA
PSD4235G2-70U 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
PSD4235G2-90U 功能描述:CPLD - 復(fù)雜可編程邏輯器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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