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參數(shù)資料
| 型號： | PSD4235G2-B-70MI |
| 廠商： | 意法半導體 |
| 英文描述： | CAP 0.47UF 25V 20% TANT SMD-3216-18 TR-7-PL GOLD |
| 中文描述： | Flash在系統(tǒng)可編程外設的16位微控制器 |
| 文件頁數(shù)： | 51/89頁 |
| 文件大小： | 703K |
| 代理商： | PSD4235G2-B-70MI |
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PSD4235G2
The Port pin’s tri-state output driver enable is con-
trolled by a two input OR gate whose inputs come
from the CPLD AND Array enable product term
and the Direction Register. If the enable product
term of any of the Array outputs are not defined
and that port pin is not defined as a CPLD output
in the PSDabel file, the Direction Register has sole
control of the buffer that drives the port pin.
The contents of these registers can be altered by
the MCU. The Port Data Buffer (PDB) feedback
path allows the MCU to check the contents of the
registers.
Ports A, B, and C have embedded Input Macro-
cells (IMC). The Input Macrocells (IMC) can be
configured as latches, registers, or direct inputs to
the PLDs. The latches and registers are clocked
by Address Strobe (ALE/AS, PD0) or a product
term from the PLD AND Array. The outputs from
the Input Macrocells (IMC) drive the PLD input bus
and can be read by the MCU. See the section en-
titled “Input Macrocell”, on page 38.
Port Operating Modes
The I/O Ports have several modes of operation.
Some modes can be defined using PSDsoft Ex-
press, some by the MCU writing to the registers in
CSIOP space, and some by both. The modes that
can only be defined using PSDsoft Express must
be programmed into the device and cannot be
changed unless the device is reprogrammed. The
modes that can be changed by the MCU can be
done so dynamically at run-time. The PLD I/O,
Data Port, Address Input, Peripheral I/O and MCU
Reset modes are the only modes that must be de-
fined before programming the device. All other
modes can be changed by the MCU at run-time.
See Application Note
AN1171
for more detail.
Table 39 summarizes which modes are available
on each port. Table 40 shows how and where the
different modes are configured. Each of the port
operating modes are described in the following
sections.
MCU I/O Mode.
In the MCU I/O mode, the MCU
uses the PSD Ports to expand its own I/O ports. By
setting up the CSIOP space, the ports on the PSD
are mapped into the MCU address space. The ad-
dresses of the ports are listed in Table 6.
A port pin can be put into MCU I/O mode by writing
a 0 to the corresponding bit in the Control Register
(for Ports E, F and G). The MCU I/O direction may
be changed by writing to the corresponding bit in
the Direction Register, or by the output enable
product term. See the section entitled “Port Oper-
ating Modes”, on page 51. When the pin is config-
ured as an output, the content of the Data Out
Register drives the pin. When configured as an in-
put, the MCU can read the port input through the
Data In buffer. See Figure 27.
Ports A, B and C do not have Control Registers,
and are in MCU I/O mode by default. They can be
used for PLD I/O if they are specified in PSDsoft
Express.
PLD I/O Mode.
The PLD I/O Mode uses a port as
an input to the CPLD’s Input Macrocells (IMC),
and/or as an output from the CPLD’s Output Mac-
rocells (OMC). The output can be tri-stated with a
control signal. This output enable control signal
can be defined by a product term from the PLD, or
by resetting the corresponding bit in the Direction
Register to 0. The corresponding bit in the Direc-
tion Register must not be set to 1 if the pin is de-
fined for a PLD input signal in PSDsoft Express.
The PLD I/O mode is specified in PSDsoft Express
by declaring the port pins, and then specifying an
equation in PSDsoft Express.
Address Out Mode.
For MCUs with a multi-
plexed address/data bus, Address Out mode can
be used to drive latched addresses onto the port
pins. These port pins can, in turn, drive external
devices. Either the output enable or the corre-
sponding bits of both the Direction Register and
Control Register must be set to a 1 for pins to use
Address Out mode. This must be done by the
MCU at run-time. See Table 41 for the address
output pin assignments on Ports E, F and G for
various MCUs.
Note: Do not drive address signals with Address
Out Mode to an external memory device if it is in-
tended for the MCU to Boot from the external de-
vice. The MCU must first Boot from PSD memory
so the Direction and Control register bits can be
set.
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