參數(shù)資料
型號: PSD4235G2V-A-70M
廠商: 意法半導體
英文描述: Conductive Polymer Chip Capacitors / T520 Series - KO Cap; Capacitance [nom]: 150uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Conductive Polymer; ESR: 15mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-31; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 2.8mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 500; Features: Low ESR
中文描述: Flash在系統(tǒng)可編程外設的16位微控制器
文件頁數(shù): 74/93頁
文件大?。?/td> 503K
代理商: PSD4235G2V-A-70M
Preliminary Information
PSD4000 Series
73
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC
Supply Voltage
All Speeds
3.0
3.6
V
VIH
High Level Input Voltage
3.0 V < VCC < 3.6 V
.7 VCC
VCC +.5
V
VIL
Low Level Input Voltage
3.0 V < VCC < 3.6 V
–.5
0.8
V
VIH1
Reset High Level Input Voltage
(Note 1)
.8 VCC
VCC +.5
V
VIL1
Reset Low Level Input Voltage
(Note 1)
–.5
.2 VCC –.1
V
VHYS
Reset Pin Hysteresis
0.3
V
VLKO
VCC Min for Flash Erase and Program
1.5
2.3
V
VOL
Output Low Voltage
IOL = 20 A, VCC = 3.0 V
0.01
0.1
V
IOL = 4 mA, VCC = 3.0 V
0.15
0.45
V
VOH
Output High Voltage Except VSTBY On
IOH = –20 A, VCC = 3.0 V
2.9
2.99
V
IOH = –1 mA, VCC = 3.0 V
2.7
2.8
V
VOH
1
Output High Voltage VSTBY On
IOH
1
= –1 A
VSBY – 0.8
V
VSBY
SRAM Standby Voltage
2.0
VCC
V
ISBY
SRAM Standby Current (VSTBY Pin)
VCC = 0 V
0.5
1
A
IIDLE
Idle Current (VSTBY Pin)
VCC > VSBY
–0.1
0.1
A
VDF
SRAM Data Retention Voltage
Only on VSTBY
2V
ISB
Standby Supply Current
CSI >VCC –0.3 V
50
100
A
for Power Down Mode
(Notes 2 and 3)
ILI
Input Leakage Current
VSS < VIN < VCC
–1
±.1
1
A
ILO
Output Leakage Current
0.45 < VIN < VCC
–10
± 5
10
A
IO
Output Current
Refer to IOL and IOH in
the VOL and VOH row
PLD_TURBO = OFF,
f = 0 MHz (Note 3)
0mA
PLD Only
PLD_TURBO = ON,
ICC (DC)
Operating
f = 0 MHz
200
400
A/PT
(Note 5)
Supply Current
During FLASH
FLASH
Write/Erase Only
10
25
mA
Read Only, f = 0 MHz
0
mA
SRAM
f = 0 MHz
0
mA
PLD AC Base
(Note 4)
Figure 27a
ICC (AC)
FLASH
(Note 5)
AC Adder
1.5
2.0
mA/MHz
SRAM AC Adder
0.8
1.5
mA/MHz
PSD4000 DC Characteristics (3.0 V to 3.6 V Versions) Advance Information
NOTES: 1. Reset input has hysteresis. VIL1 is valid at or below .2VCC –.1. VIH1 is valid at or above .8VCC.
2. CSI deselected or internal PD mode is active.
3. PLD is in non-turbo mode and none of the inputs are switching.
4. Refer to Figure 31a for PLD current calculation.
5. IO = 0 mA.
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PSD4235G2V-A-70MI Flash In-System-Programmable Peripherals for 16-Bit MCUs
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