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參數(shù)資料
| 型號： | PSD4235G2V-A-70U |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| 中文描述： | Flash在系統(tǒng)可編程外設(shè)的16位微控制器 |
| 文件頁數(shù)： | 10/93頁 |
| 文件大?。?/td> | 503K |
| 代理商： | PSD4235G2V-A-70U |
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Preliminary Information
PSD4000 Series
15
9.0
The
PSD4000
Functional
Blocks
As shown in Figure 1, the PSD4000 consists of six major types of functional blocks:
t Memory Blocks
t PLD Blocks
t Bus Interface
t I/O Ports
t Power Management Unit
t JTAG-ISP Interface
The functions of each block are described in the following sections. Many of the blocks
perform multiple functions, and are user configurable.
9.1 Memory Blocks
The PSD4000 has the following memory blocks:
The main Flash memory
Secondary Flash memory
SRAM.
The memory select signals for these blocks originate from the Decode PLD (DPLD) and
are user-defined in PSDsoft.
Table 7 summarizes which versions of the PSD4000 contain which memory blocks.
Main Flash
Secondary Flash
Device
Flash Size
Sector Size
Block Size
Sector Size
SRAM
PSD4135G2
512KB
64KB
32KB
8KB
Table 7. Memory Blocks
9.1.1 Main Flash and Secondary Flash Memory Description
The main Flash memory block is divided evenly into eight sectors. The secondary Flash
memory is divided into four sectors of eight Kbytes each. Each sector of either memory
can be separately protected from program and erase operations.
Flash memory may be erased on a sector-by-sector basis and programmed word-by-word.
Flash sector erasure may be suspended while data is read from other sectors of memory
and then resumed after reading.
During a program or erase of Flash, the status can be output on the Rdy/Bsy pin of Port
PE4. This pin is set up using PSDsoft.
9.1.1.1 Memory Block Selects
The decode PLD in the PSD4000 generates the chip selects for all the internal memory
blocks (refer to the PLD section). Each of the eight Flash memory sectors have a
Flash Select signal (FS0-FS7) which can contain up to three product terms. Each of the
four Secondary Flash memory sectors have a Select signal (CSBOOT0-3) which can
contain up to three product terms. Having three product terms for each sector select signal
allows a given sector to be mapped in different areas of system memory. When using a
microcontroller (80C51XA) with separate Program and Data space, these flexible select
signals allow dynamic re-mapping of sectors from one space to the other before and after
IAP.
9.1.1.2 The Ready/Busy Pin (PE4)
Pin PE4 can be used to output the Ready/Busy status of the PSD4000. The output on the
pin will be a ‘0’ (Busy) when Flash memory blocks are being written to, or when the Flash
memory block is being erased. The output will be a ‘1’ (Ready) when no write or erase
operation is in progress.
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| PSD4235G2V-A-70UI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G2V-A-90B81 | Tantalum Electrolytic Capacitor; Capacitance:150uF; Capacitance Tolerance:+/- 20 %; Working Voltage, DC:8V; Package/Case:7343-31; Terminal Type:PCB SMT; ESR:0.0055ohm; Series:T520 |
| PSD4235G2V-A-90B81I | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G2V-A-90J | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235G2V-A-90JI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
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