參數(shù)資料
型號(hào): PSD4235G2V-B-15M
廠(chǎng)商: 意法半導(dǎo)體
英文描述: Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述: Flash在系統(tǒng)可編程外設(shè)的16位微控制器
文件頁(yè)數(shù): 79/93頁(yè)
文件大?。?/td> 503K
代理商: PSD4235G2V-B-15M
Preliminary Information
PSD4000 Series
-90
-12
Symbol
Parameter
Conditions
Min
Max
Min
Max
Unit
tLVDV
ALE Access Time from
Power Down
128
135
ns
Maximum Delay from APD Enable
tCLWH
to Internal PDN Valid Signal
Using CLKIN Input
15 * tCLCL (s) (Note 1)
s
Power Down Timing (3.0 V to 3.6 V Versions)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tNLNH
Warm RESET Active Low Time (Note 1)
300
ns
tOPR
RESET High to Operational Device
300
ns
tNLNH-PO
Power On Reset Active Low Time
1
ms
Warm RESETActive Low Time
tNLNH-A
(Note 2)
25
s
Reset Pin Timing (3.0 V to 3.6 V Versions)
NOTE: 1. tCLCL is the CLKIN clock period.
Microcontroller Interface – PSD4000 AC/DC Parameters
(3.0 V to 3.6 V Versions)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tBVBH
Vstby Detection to Vstbyon Output
High
(Note 1)
20
s
tBXBL
Vstby Off Detection to Vstbyon
Output Low
(Note 1)
20
s
Vstbyon Timing (3.0 V to 3.6 V Versions)
NOTE: 1. RESET will not abort Flash programming/erase cycles.
2. RESET will abort Flash programming or erase cycle.
NOTE: 1. Vstbyon is measured at VCC ramp rate of 2 ms.
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