參數(shù)資料
型號： PSD4235G2V-B-70MI
廠商： 意法半導(dǎo)體
英文描述： Flash In-System-Programmable Peripherals for 16-Bit MCUs
中文描述： Flash在系統(tǒng)可編程外設(shè)的16位微控制器
文件頁數(shù)： 56/93頁
文件大?。?/td> 503K
代理商： PSD4235G2V-B-70MI
Preliminary Information
PSD4000 Series
t A simple interface to 16-bit microcontrollers that use either multiplexed or
non-multiplexed busses. The bus interface logic uses the control signals generated by
the microcontroller automatically when the address is decoded and a read or write is
performed. A partial list of the MCU families supported include:
Intel 80196, 80296, 80186, and 80386EX
Motorola 68HC16, 68HC12, 683XX, and MC2001
Philips 80C51XA
Infineon C16X devices
Hitachi H8
t 4 Mbit Flash memory. This is the main Flash memory. It is divided into eight
equal-sized blocks that can be accessed with user-specified addresses.
t Internal secondary 256 Kbit Flash boot memory. It is divided into four equal-sized
blocks that can be accessed with user-specified addresses. This secondary memory
brings the ability to execute code and update the main Flash concurrently.
t 64 Kbit SRAM. The SRAM’s contents can be protected from a power failure by
connecting an external battery.
t General Purpose PLD (GPLD) with 24 outputs. The GPLD may be used to implement
external chip selects or combinatorial logic function.
t Decode PLD (DPLD) that decodes address for selection of internal memory blocks.
t 52 individually configurable I/O port pins that can be used for the following functions:
MCU I/Os
PLD I/Os
Latched MCU address output
Special function I/Os.
I/O ports may be configured as open-drain outputs.
t Standby current as low as 50 A for 5 V devices.
t Built-in JTAG compliant serial port allows full-chip In-System Programmability (ISP).
With it, you can program a blank device or reprogram a device in the factory or the field.
t Internal page register that can be used to expand the microcontroller address space
by a factor of 256.
t Internal programmable Power Management Unit (PMU) that supports a low power
mode called Power Down Mode. The PMU can automatically detect a lack of
microcontroller activity and put the PSD4000 into Power Down Mode.
t Erase/Write cycles:
Flash memory – 100,000 minimum
PLD – 1,000 minimum
15 year data retention
2.0
Key Features
3
3.0 PSD4000
Series
Part #
Flash
Main
Boot
Serial ISP
Memory
PSD4000
I/O
PLD
Input
Output
PLD
JTAG/ISP
Kbit
SRAM
Supply
Series
Device
Pins
Inputs Macrocells Macrocells Outputs
Port
8 Sectors
(4 Sectors)
Kbit
Voltage
PSD4000
PSD4135G2
52
66
24
Yes
4096
256
64
5V
PSD4235G2*
52
82
24
16
24
Yes
4096
256
64
5V
Table 1. PSD4000 Product Matrix
*See PSD4235G2 Data Sheet.
相關(guān)PDF資料
PDF描述
PSD4235G2V-B-70U CAP 330UF 6V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-3500
PSD4235G2V-B-70UI Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G2V-B-90B81 CAP 330UF 6V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-0450
PSD4235G2V-B-90B81I Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G2V-B-90J Flash In-System-Programmable Peripherals for 16-Bit MCUs
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