參數(shù)資料
型號： PSD4235G3-A-15B81
廠商： 意法半導(dǎo)體
英文描述： CAP 47UF 6.3V 20% TANT SMD-3216-18 TR-13-PL SN100%
中文描述： Flash在系統(tǒng)可編程ISP的外設(shè)的16位微控制器5V電源
文件頁數(shù)： 14/89頁
文件大?。?/td> 703K
代理商： PSD4235G3-A-15B81
PSD4235G2
14/89
PSD REGISTER DESCRIPTION AND ADDRESS OFFSETS
Table 6 shows the offset addresses to the PSD
registers relative to the CSIOP base address. The
CSIOP space is the 256 bytes of address that is al-
located by the user to the internal PSD registers.
Table 6 provides brief descriptions of the registers
in CSIOP space. The following sections give a
more detailed description.
Table 6. Register Address Offset
Note: 1. Other registers that are not part of the I/O ports.
Register Name
Port
A
Port
B
Port
C
Port
D
Port
E
Port
F
Port
G
Other
1
Description
Data In
00
01
10
11
30
40
41
Reads Port pin as input, MCU I/O input mode
Control
32
42
43
Selects mode between MCU I/O or Address
Out
Data Out
04
05
14
15
34
44
45
Stores data for output to Port pins, MCU I/O
output mode
Direction
06
07
16
17
36
46
47
Configures Port pin as input or output
Drive Select
08
09
18
19
38
48
49
Configures Port pins as either CMOS or
Open Drain on some pins, while selecting
high slew rate on other pins.
Input Macrocell
0A
0B
1A
Reads Input Macrocells
Enable Out
0C
0D
1C
4C
Reads the status of the output enable to the
I/O Port driver
Output
Macrocells A
20
Read – reads output of Macrocells A
Write – loads Macrocell Flip-flops
Output
Macrocells B
21
Read – reads output of Macrocells B
Write – loads Macrocell Flip-flops
Mask
Macrocells A
22
Blocks writing to the Output Macrocells A
Mask
Macrocells B
23
Blocks writing to the Output Macrocells B
Flash Memory
Protection
C0
Read only – Primary Flash Sector Protection
Flash Boot
Protection
C2
Read only – PSD Security and Secondary
Flash memory Sector Protection
JTAG Enable
C7
Enables JTAG Port
PMMR0
B0
Power Management Register 0
PMMR2
B4
Power Management Register 2
Page
E0
Page Register
VM
E2
Places PSD memory areas in Program and/
or Data space on an individual basis.
Memory_ID0
F0
Read only – SRAM and Primary memory
size
Memory_ID1
F1
Read only – Secondary memory type and
size
相關(guān)PDF資料
PDF描述
PSD4235G3-A-15B81I Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G3-A-15J Flash In-System-Programmable Peripherals for 16-Bit MCUs
PSD4235G3-A-15JI CAP 0.68UF 20V 10% TANT SMD-3216-18 TR-13-PL GOLD
PSD4235G3-A-15M CAP 0.68UF 20V 10% TANT SMD-3216-18 TR-13-PL SN/PB5%
PSD4235G3-A-15MI CAP 0.68UF 20V 10% TANT SMD-3216-18 TR-13-PL SN100%
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