參數(shù)資料
型號(hào)： PSD503B1
英文描述： PSD5XX/ZPSD5XX FAMILY FIELD-PROGRAMMABLE MICROCONTROLLER PERIPHERALS
中文描述： PSD5XX/ZPSD5XX家庭領(lǐng)域，可編程微控制器外設(shè)
文件頁數(shù)： 107/153頁
文件大小： 1036K
代理商： PSD503B1
PSD5XX Famly
104
12.0
System
Configuration
The CSIOP signal, which is generated by the DPLD, selects the internal I/O devices or
registers. The CSIOP signal takes up 256 bytes of address space and is defined by the user
in the PSDSoft Software. The following is an address offset map for the various devices
relative to the CSIOP base address.
Some Motorola 16-bit microcontrollers have a different data bus/data byte orientation. This
requires a different address offset for the internal PSD5XX I/O devices or registers. Tables
30a and 31a in this section are for this group of microcontrollers which include the
M68HC16, M68302 and M683XX.
The following table is the address map offset of the I/O port registers.
Address Ofset
Port B
Register Name
Port A
Port C
Port D
Port E
Data In
00
01
10
11
20
Control
02
03
12
13
22
Data Out
04
05
14
15
24
Direction
06
07
16
17
26
Open Drain
18
19
Special Function
08
09
28
PLD – I/O
0A
0B
2A
Macrocell Out
0C
0D
2C
Table 30. I/ORegister Address Ofset
Address Ofset
Port B
Register Name
Port A
Port C
Port D
Port E
Data In
01
00
11
10
21
Control
03
02
13
12
23
Data Out
05
04
15
14
25
Direction
07
06
17
16
27
Open Drain
19
18
Special Function
09
08
29
PLD – I/O
0B
0A
2B
Macrocell Out
0D
0C
2D
Table 30a. I/ORegister Address Ofset
(For 16-Bit Motorola MCUs in 16-Bit Mode. If 8-Bit Mode is selected, use Table 30.)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD503B1-12J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD503B1-12JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD503B1-12LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD503B1-12U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
PSD503B1-12UI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
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