參數(shù)資料
型號(hào)： PSD813270JIT
廠商： 意法半導(dǎo)體
英文描述： Flash In-System Programmable ISP Peripherals For 8-bit MCUs
中文描述： Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁(yè)數(shù)： 86/110頁(yè)
文件大小： 1737K
代理商： PSD813270JIT
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
86/110
Figure 44. Input Macrocell Timing (product term clock)
Table 53. Input Macrocell Timing (5V devices)
Note: 1. Inputs from Port A, B, and C relative to register/ latch clock from the PLD. ALE/AS latch timings refer to t
AVLX
and t
LXAX
.
Table 54. Input Macrocell Timing (3V devices)
Note: 1. Inputs from Port A, B, and C relative to register/latch clock from the PLD. ALE latch timings refer to t
AVLX
and t
LXAX
.
Symbol
Parameter
Conditions
-70
-90
-15
PT
Aloc
Turbo
Off
Unit
Min
Max
Min
Max
Min
Max
t
IS
Input Setup Time
(Note
1
)
0
0
0
ns
t
IH
Input Hold Time
(Note
1
)
15
20
26
+ 10
ns
t
INH
NIB Input High Time
(Note
1
)
9
12
18
ns
t
INL
NIB Input Low Time
(Note
1
)
9
12
18
ns
t
INO
NIB Input to Combinatorial
Delay
(Note
1
)
34
46
59
+ 2
+ 10
ns
Symbol
Parameter
Conditions
-12
-15
-20
PT
Aloc
Turbo
Off
Unit
Min
Max
Min
Max
Min
Max
t
IS
Input Setup Time
(Note
1
)
0
0
0
ns
t
IH
Input Hold Time
(Note
1
)
25
25
30
+ 20
ns
t
INH
NIB Input High Time
(Note
1
)
12
13
15
ns
t
INL
NIB Input Low Time
(Note
1
)
12
13
15
ns
t
INO
NIB Input to Combinatorial
Delay
(Note
1
)
46
62
70
+ 4
+ 20
ns
t
INH
t
INL
t
INO
t
IH
t
IS
PT CLOCK
INPUT
OUTPUT
AI03101
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PSD813270JT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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