參數(shù)資料
型號: PSD813F3-20
廠商: 意法半導(dǎo)體
英文描述: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
中文描述: Flash在系統(tǒng)可編程(ISP)的周邊8位MCU,5V的
文件頁數(shù): 73/110頁
文件大?。?/td> 1685K
代理商: PSD813F3-20
73/110
PSD813F1
AC/DC PARAMETERS
The following tables describe the AD and DC pa-
rameters of the PSD:
DC Electrical Specification
AC Timing Specification
PLD Timing
Combinatorial Timing
Synchronous Clock Mode
Asynchronous Clock Mode
Input Macrocell Timing
MCU Timing
READ Timing
WRITE Timing
Peripheral Mode Timing
Power-down and Reset Timing
I
I
The following are issues concerning the parame-
ters presented:
In the DC specification the supply current is
given for different modes of operation. Before
calculating the total power consumption,
determine the percentage of time that the PSD
is in each mode. Also, the supply power is
considerably different if the Turbo bit is
0.
The AC power component gives the PLD,
EEPROM and SRAM mA/MHz specification.
Figures
36
and
37
show the PLD mA/MHz as
a function of the number of Product Terms
(PT) used.
In the PLD timing parameters, add the
required delay when Turbo bit is
0.'
I
I
I
Figure 36. PLD I
CC
/Frequency Consumption (5V range)
Figure 37. PLD I
CC
/Frequency Consumption (3V range)
60
V
CC
= 3V
0
10
20
30
40
60
70
80
90
100
110
V
CC
= 5V
TURBO ON (100%)
50
0
10
15
5
20
25
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
I
C
TURBO ON (25%)
TURBOOFF
TURBO OFF
PT 100%
PT 25%
AI02894
0
10
20
30
40
50
0
10
15
5
20
25
I
C
TURBO ON (100%)
TURBO ON (25%)
TURBOOFF
TURBO OFF
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
PT 100%
PT 25%
AI03100
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