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      參數(shù)資料
      型號(hào): PSD913470MT
      廠商: 意法半導(dǎo)體
      英文描述: Registered Hex TTL/ECL Translator; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500
      中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
      文件頁(yè)數(shù): 40/110頁(yè)
      文件大小: 1737K
      代理商: PSD913470MT
      PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
      40/110
      Input Macrocells (IMC)
      The CPLD has 24 Input Macrocells (IMC), one for
      each pin on Ports A, B, and C. The architecture of
      the Input Macrocells (IMC) is shown in
      Figure
      17., page 41
      . The Input Macrocells (IMC) are indi-
      vidually configurable, and can be used as a latch,
      register, or to pass incoming Port signals prior to
      driving them onto the PLD input bus. The outputs
      of the Input Macrocells (IMC) can be read by the
      MCU through the internal data bus.
      The enable for the latch and clock for the register
      are driven by a multiplexer whose inputs are a
      product term from the CPLD AND Array or the
      MCU Address Strobe (ALE/AS). Each product
      term output is used to latch or clock four Input
      Macrocells (IMC). Port inputs 3-0 can be con-
      trolled by one product term and 7-4 by another.
      Configurations for the Input Macrocells (IMC) are
      specified by equations written in PSDabel (see Ap-
      plication Note
      AN1171
      ). Outputs of the Input Mac-
      rocells (IMC) can be read by the MCU via the IMC
      buffer.
      See
      the
      section
      PORTS, page 51
      .
      entitled
      I/O
      Input Macrocells (IMC) can use Address Strobe
      (ALE/AS, PD0) to latch address bits higher than
      A15. Any latched addresses are routed to the
      PLDs as inputs.
      Input Macrocells (IMC) are particularly useful with
      handshaking communication applications where
      two processors pass data back and forth through
      a common mailbox.
      Figure 18., page 42
      shows a
      typical configuration where the Master MCU writes
      to the Port A Data Out Register. This, in turn, can
      be read by the Slave MCU via the activation of the
      “Slave-Read” output enable product term.
      The Slave can also write to the Port A Input Mac-
      rocells (IMC) and the Master can then read the In-
      put Macrocells (IMC) directly.
      Note that the “Slave-Read” and “Slave-Wr” signals
      are product terms that are derived from the Slave
      MCU inputs Read Strobe (RD, CNTL1), Write
      Strobe (WR, CNTL0), and Slave_CS.
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