參數(shù)資料
型號(hào)： PSD9135V20JIT
廠(chǎng)商： 意法半導(dǎo)體
英文描述： 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
中文描述： Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
文件頁(yè)數(shù)： 54/110頁(yè)
文件大?。?/td> 1737K
代理商： PSD9135V20JIT
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
54/110
Table 20. Port Operating Mode Settings
Note: 1. N/A = Not Applicable
2. The direction of the Port A,B,C, and D pins are controlled by the Direction Register ORed with the individual output enable product
term (.oe) from the CPLD AND Array.
3. Any of these three methods enables the JTAG pins on Port C.
Table 21. I/O Port Latched Address Output Assignments
Note: 1. N/A = Not Applicable.
Mode
Defined in
PSDabel
Defined in PSD
Configuration
Control
Register
Setting
Direction
Register
Setting
VM
Register
Setting
JTAG Enable
MCU I/O
Declare pins only
N/A
1
0
1 = output,
0 = input
(Note
2
)
N/A
N/A
PLD I/O
Logic equations
N/A
N/A
(Note
2
)
N/A
N/A
Data Port (Port A)
N/A
Specify bus type
N/A
N/A
N/A
N/A
Address Out
(Port A,B)
Declare pins only
N/A
1
1 (Note
2
)
N/A
N/A
Address In
(Port A,B,C,D)
Logic for equation
Input Macrocells
N/A
N/A
N/A
N/A
N/A
Peripheral I/O
(Port A)
Logic equations
(PSEL0 & 1)
N/A
N/A
N/A
PIO bit = 1
N/A
JTAG ISP (Note
3
)
JTAGSEL
JTAG
Configuration
N/A
N/A
N/A
JTAG_Enable
MCU
Port A (PA3-PA0)
Port A (PA7-PA4)
Port B (PB3-PB0)
Port B (PB7-PB4)
8051XA (8-Bit)
N/A
1
Address a7-a4
Address a11-a8
N/A
80C251
(Page Mode)
N/A
N/A
Address a11-a8
Address a15-a12
All Other
8-Bit Multiplexed
Address a3-a0
Address a7-a4
Address a3-a0
Address a7-a4
8-Bit
Non-Multiplexed Bus
N/A
N/A
Address a3-a0
Address a7-a4
相關(guān)PDF資料
PDF描述
PSD9135V20JT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
PSD9135V20MIT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500
PSD9135V20MT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500
PSD9135V70MT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: TSSOP 8 3.0x3.0x0.95 mm; No of Pins: 8; Container: Rail; Qty per Container: 100
PSD9135V90MT 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer; Package: TSSOP 8 3.0x3.0x0.95 mm; No of Pins: 8; Container: Rail; Qty per Container: 100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PSD9135V20JT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V20MIT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V20MT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V70JIT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
PSD9135V70JT 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs
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