參數(shù)資料
型號(hào): PSD935F3V-15B81I
廠商: 意法半導(dǎo)體
英文描述: Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 30000uF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-0.1pF; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 0805; Termination: Solder Coated (Sn/Pb, 70/30); Body Dimensions: 0.080" x 0.050" x 0.055"; Container: Bag; Features: MIL-PRF-55681: S Failure Rate
中文描述: 在8片位微控制器可配置存儲(chǔ)系統(tǒng)
文件頁(yè)數(shù): 52/91頁(yè)
文件大?。?/td> 488K
代理商: PSD935F3V-15B81I
PSD935G2
PSD9XX Family
Drive
Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Port A
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port B
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port C
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Slew
Rate
Port D
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port E
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Port G
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Open
Drain
Table 22. Drive Register Pin Assignment
The
PSD935G2
Functional
Blocks
(cont.)
9.4.3.3 Drive Select Register
The Drive Select Register configures the pin driver as Open Drain or CMOS for some port
pins, and controls the slew rate for the other port pins. An external pull-up resistor should
be used for pins configured as Open Drain.
A pin can be configured as Open Drain if its corresponding bit in the Drive Select Register
is set to a ‘1’. The default pin drive is CMOS.
Aside:
the slew rate is a measurement of the rise and fall times of an output. A higher
slew rate means a faster output response and may create more electrical noise. A pin
operates in a high slew rate when the corresponding bit in the Drive Register is set to ‘1’.
The default rate is slow slew.
Table 22 shows the Drive Register for Ports A, B, C, D, E and G. It summarizes which
pins can be configured as Open Drain outputs and which pins the slew rate can be set for.
Port F always has CMOS drive.
51
9.4.4 Port Data Registers
The Port Data Registers, shown in Table 23, are used by the microcontroller to write data
to or read data from the ports. Table 23 shows the register name, the ports having each
register type, and microcontroller access for each register type. The registers are
described below.
9.4.4.1 Data In
Port pins are connected directly to the Data In buffer. In MCU I/O input mode, the pin input
is read through the Data In buffer.
9.4.4.2 Data Out Register
Stores output data written by the MCU in the MCU I/O output mode. The contents of the
Register are driven out to the pins if the Direction Register or the output enable
product term is set to “1”. The contents of the register can also be read back by the
microcontroller.
Register Name
Port
MCU Access
Data In
A,B,C,D,E,F,G
Read – input on pin
Data Out
A,B,C,D,E,F,G
Write/Read
Table 23. Port Data Registers
相關(guān)PDF資料
PDF描述
PSD935F3V-15J Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15JI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15M Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15MI Configurable Memory System on a Chip for 8-Bit Microcontrollers
PSD935F3V-15U Configurable Memory System on a Chip for 8-Bit Microcontrollers
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