參數(shù)資料
        型號: PSD9535V90JT
        廠商: 意法半導(dǎo)體
        英文描述: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
        中文描述: Flash在系統(tǒng)可編程ISP的外設(shè)的8位微控制器
        文件頁數(shù): 12/110頁
        文件大?。?/td> 1737K
        代理商: PSD9535V90JT
        PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
        12/110
        PC2
        18
        I/O
        PC2 pin of Port C. This port pin can be configured to have the following functions:
        MCU I/O – write to or read from a standard output or input port.
        CPLD macrocell (McellBC2) output.
        Input to the PLDs.
        V
        STBY
        – SRAM stand-by voltage input for SRAM battery backup.
        This pin can be configured as a CMOS or Open Drain output.
        PC3
        17
        I/O
        PC3 pin of Port C. This port pin can be configured to have the following functions:
        MCU I/O – write to or read from a standard output or input port.
        CPLD macrocell (McellBC3) output.
        Input to the PLDs.
        TSTAT output
        2
        for the JTAG Serial Interface.
        Ready/Busy output for parallel In-System Programming (ISP).
        This pin can be configured as a CMOS or Open Drain output.
        PC4
        14
        I/O
        PC4 pin of Port C. This port pin can be configured to have the following functions:
        MCU I/O – write to or read from a standard output or input port.
        CPLD macrocell (McellBC4) output.
        Input to the PLDs.
        TERR output
        2
        for the JTAG Serial Interface.
        Battery-on Indicator (V
        BATON
        ). Goes High when power is being drawn from the external
        battery.
        This pin can be configured as a CMOS or Open Drain output.
        PC5
        13
        I/O
        PC5 pin of Port C. This port pin can be configured to have the following functions:
        MCU I/O – write to or read from a standard output or input port.
        CPLD macrocell (McellBC5) output.
        Input to the PLDs.
        TDI input
        2
        for the JTAG Serial Interface.
        This pin can be configured as a CMOS or Open Drain output.
        PC6
        12
        I/O
        PC6 pin of Port C. This port pin can be configured to have the following functions:
        MCU I/O – write to or read from a standard output or input port.
        CPLD macrocell (McellBC6) output.
        Input to the PLDs.
        TDO output
        2
        for the JTAG Serial Interface.
        This pin can be configured as a CMOS or Open Drain output.
        Pin Name
        Pin
        Type
        Description
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