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參數(shù)資料
| 型號： | PSK3612-7EPCB |
| 廠商： | POWER-ONE INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE K01, MODULE |
| 文件頁數(shù)： | 19/19頁 |
| 文件大?。?/td> | 370K |
| 代理商： | PSK3612-7EPCB |
PSS, PSK Extended Data Sheet
Positive Switching Regulator (Industrial)
REV. FEB 25, 2004
Page 9 of 19
R Control for Output Voltage Adjustment
Note: With open R input,
Vo
≈ Vo nom.
The output voltage
Vo can either be adjusted with an exter-
nal reference voltage (
Vext) or with an external resistor (R1
or
R2).The adjustment range is 0 to Vo max.The minimum dif-
ferential voltage
Vio min between input and output (see
Electrical Input Data) should be maintained. Undervoltage
lock-out = minimum input voltage.
S+
R
+
4000
Vref
Vext
–
+
S–
06048
S+
R
–
+
4000
Uref
R1
R2
S–
06049
Fig. 9
Voltage adjustment with Vext between R and S–
a)
Vo = 0 - Vo max, using Vext between R and S–:
Vo
Vext
≈ 2.5 V –––––
Vo
≈ Vo nom –––––
Vonom
2.5 V
Fig. 10
Voltage adjustment with external resistor R1 or R2.
PSK 3E25 modified exteral voltage adjustment: R pin is
internally connected to S– with a 7.32 k
W resistor. This
has to be taken in account, when setting the output volt-
age with an external resistor.
b)
Vo = 0 - 100% Vo nom, using R1 between R and S–:
4000
Vo
Vo nom R1
R1
≈ –––––––––––
Vo
≈ –––––––––––
Vonom – Vo
R1 + 4000
c)
Vo = Vo nom - Vo max, using R2 between R and S+:
4000
Vo (Vo nom – 2.5 V)
R2
≈ ––––––––––––––––––––––––
2.5 V (
Vo – Vo nom)
Vo nom 2.5 V R2
Vo
≈ ––––––––––––––––––––––––––––––––
2.5 V (
R2 + 4000
) – Vo nom 4000
Caution: To prevent damage
Vext should not exceed 20 V,
nor be negative, and
R2 should never be less than 47 k
.
Table 6: Maximum adjustable output voltage
Characteristics
Conditions
PSK 3E25
PSS 1212
PSS 2412
PSS 3612
PSS 5A12
PSK 1216
PSK 2416
PSK 3616
PSK 5A16
PSK 1220
PSK 2420
PSK 3620
PSK 5A20
PSK 5A25
min typ max
Unit
Vo max Maximum adjustable
Vi nom, Io nom
5.6
16.0
26.0
42.5
V
output at R control input
CS
Current Sharing
For parallel operation of several modules, interconnecting
all CS pins ensures that the output currents are evenly dis-
tributed. This feature improves transient load performance
and increases system reliability. All paralleled units should
be
supplied
by
equal
input
voltage
(
Vi)
and
interconnecting leads should have equal length and cross
section to ensure equal voltage drop.
Test Sockets
Test sockets (pin
= 2 mm) for measuring the output volt-
age
Vo internally at the connector terminals, are located at
the front side of the module. The test sockets are protected
by a series resistor.
LED Output Voltage Indicator
A green output indicator LED shines when the output volt-
age is higher than approx. 3 V.
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