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    1. 參數(shù)資料
      型號(hào): PSL248-7LIRCDA
      元件分類: 電源模塊
      英文描述: 1-OUTPUT DC-DC REG PWR SUPPLY MODULE
      封裝: METAL, CASE L04, MODULE
      文件頁數(shù): 10/11頁
      文件大?。?/td> 245K
      代理商: PSL248-7LIRCDA
      PSL-Family
      Switching Regulators 19"
      Industrial Environment
      5 - 44
      Edition 2/96 - Melcher AG
      MELCHER
      The Power Partners.
      5.2
      Caution: To prevent damage
      Uex should not exceed
      Uref, nor be negative.
      Vo +
      R
      +
      G
      4000
      Uref
      R1
      R2
      Go –
      Fig. 7
      Voltage adjustment with external resistor R1 or R2 []
      b)
      Uo = 0...100% Uo nom, using R1 between R and G (Go-):
      R1
      4000
      Uo
      ≈ Uo nom ––––––––
      R1
      ≈ –––-––––
      R1 + 4000
      Uo nom - Uo
      c)
      Uo = Uo nom...Uo max, using R2 between R and Vo+:
      Uo max = Uo nom + 8 %
      R2
      U ref
      Uo
      ≈ Uref ––––––––––––––––––
      k = ––––––
      k (
      R2 + 4000) - 4000
      Uo nom
      Uo (1-k)
      R2 ≈ 4000 –––––––––
      (
      Uref = 2.5 V ±4%)
      k
      Uo - Uref
      All formulae give approximate values only.
      Uo nom
      a)
      Uo ≈ Uex ––––––
      (
      Uref = 2.5 V ±4%)
      Uref
      Fig. 6
      Voltage adjustment with Uex [V] between R and G (Go-):
      Vo +
      R
      +
      4000
      G
      U ref
      Uex
      +
      Go –
      Standard Features
      R External Output Voltage Adjustment
      Note: With open R input,
      Uo = Uo nom.
      (For superseded PSR types,
      Uo = 1.08 Uo nom)
      R-input together with option i or option P cannot
      be supported simultaneously.
      The output voltage
      Uo can either be adjusted with an exter-
      nal resistor (
      R 1 or R 2) or with an external voltage (Uex). The
      adjustment range is 0...1.08 of
      Uo nom. The minimal differen-
      tial voltage
      U
      io min between input and output should be
      maintained (see data). Min. input = Undervoltage cut-out.
      Data
      Table 9: Inhibit characteristics
      Characteristics
      Conditions
      min
      typ
      max
      Unit
      Uinh
      Inhibit input voltage to keep
      Uo = on
      Ui min...Ui max
      –50
      +0.8
      V DC
      regulator output voltage...
      Uo = off
      TC min...TC max
      +2.4
      +50
      t r
      Switch-on time after inhibit command
      Ui = Ui nom
      5ms
      t f
      Switch-off time after inhibit command
      RL = Uo nom /Io nom
      10
      Ii off
      Input current when inhibited
      Io = 0, Ui =Ui nom
      10
      mA
      Fig. 10
      Inhibit current Iinh versus inhibit voltage Uinh
      Fig. 9
      Output response as a function of inhibit signal
      Description of Options
      Option i Inhibit
      Note: With open i-input, output is enabled (
      Uo = on).
      Inhibit excludes R function!
      The inhibit input allows the switching regulators to be disa-
      bled via a control signal. In systems with several units, this
      feature can be used, for example, to control the activation
      sequence of the regulators by a logic signal (TTL, C-MOS,
      etc.).
      An output voltage overshoot will not occur when the units
      are switched on or off.
      1
      0.1
      0
      Uo/Uo nom
      U inh
      tr
      tf
      t
      1
      4
      2
      0
      -50 -40
      20
      40
      -30
      0
      -20 -10
      10
      30
      50
      5
      3
      1
      I inh [mA]
      U inh [V]
      U o on
      U o off
      U
      inh
      =
      0.8
      V
      U
      inh
      =
      2.4
      V
      Vi+
      Gi–
      Go–
      i
      Vo+
      Iinh
      Uinh
      Fig. 8
      Definition of Iinh and Uinh
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