- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69132 > PSL368-9LIRCDA 1-OUTPUT DC-DC REG PWR SUPPLY MODULE PDF資料下載
參數(shù)資料
| 型號： | PSL368-9LIRCDA |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE L04, MODULE |
| 文件頁數(shù)： | 11/11頁 |
| 文件大?。?/td> | 245K |
| 代理商： | PSL368-9LIRCDA |
Industrial Environment
Switching Regulators 19"
PSL-Family
Edition 2/96 - Melcher AG
5 - 45
MELCHER
The Power Partners.
5.2
Option -9 Extended Temperature Range
The operational ambient temperature range is extended to
TA = –40...71
°C.
Option P Potentiometer
Option P and the R-function cannot be supported simulta-
neously. The output voltage
Uo can be adjusted with a
screwdriver in the range from 0.92...1.08 of the nominal out-
put voltage
Uo nom.
However, the minimum differential voltage
U
i o min between
input and output voltages as specified in "Electrical Input
and Output Data" should be maintained.
Option U Ambient Temp. Range acc. UL Recognition
Underwriters Laboratories (UL) have approved the PSL
family as recognized components up to an ambient tem-
perature of
T
A max – 10 K given by the upper temperature
limit of the standard PCB material. If the full maximum am-
bient temperature
TA max is required with UL approval, op-
tion U should be requested. It consists of an alternative
PCB material with a higher maximum temperature specifi-
cation.
The European approval boards have in contrast to UL ac-
cepted the standard PCB material to be operated up to
T
A max = 71°C without any further precautions.
Option L Input filter
Option L is recommended to reduce superimposed inter-
ference voltages, and to prevent oscillations, if input lines
exceed approx. 5 m in total length. The fundamental wave
(approx. 120 kHz) of the reduced interference voltage be-
tween Vi+ and Gi– has, with an input line inductance of
5
H a maximum magnitude of 4 mVrms.
The input impedance of the switching regulator at 120 kHz
is about 50 m
. The harmonics are small in comparison
with the fundamental wave. See also data: RFI.
With option L, the maximum permissible additionally super-
imposed ripple
ui of the input voltage (rectifier mode) at a
specified input frequency
f i has the following values:
Input voltage up to 40 V:
ui max = 12 Vpp at 100 Hz or Vpp = 1200 Hz/f i 1V
Input voltage up to 80 V:
ui max = 22 Vpp at 100 Hz or Vpp = 2200 Hz/f i 1V
Option C
Thyristor Crowbar
This option is recommended to protect the load against
power supply malfunction, but it is not designed to sink ex-
ternal currents.
A fixed-value monitoring circuit checks the output voltage
Uo. When the trigger voltage Uoc is reached, the thyristor
crowbar triggers and disables the output. It may be deacti-
vated by removal of the input voltage. In case of a switching
transistor defect, an internal fuse prevents excessive cur-
rent.
Note: As a central overvoltage protection device, the crow-
bar is usually connected to the external load via distributed
inductance of the lines. For this reason, the overvoltage at
the load can temporarily exceed the trigger voltage
Uoc. De-
pending on the application, further decentralized over-
voltage protection elements may have to be used addition-
ally.
Table 10: Crowbar trigger levels
Characteristics
Conditions
5.1 V
12 V
15 V
24 V
36 V
Unit
min
max
min
max
min
max
min
max
min
max
Uo c
Trigger voltage
Ui min...Ui max
5.8
6.8
13.5
16
16.5
19
27
31
40
45.5
V
Io = 0...Io nom
ts
Delay time
TC min...TC max
1.5
s
Option D
(“Save Data”, input undervoltage monitor)
Note: Output instead of input undervoltage monitor is
available on request (option D1).
If the input voltage
Ui is below the adjustable threshold volt-
age
Ut, the control circuit for terminal D has low impedance.
Terminal D and Go– are connected to a self-conducting
field effect transistor (FET). A 0.5 W Zener diode provides
protection against overvoltages.
The voltage
Ut can be externally adjusted with a trim poten-
tiometer by means of a screwdriver. The hysteresis
UH of
Ut is <2%. Terminal D stays low for a minimum time
tlow min, in order to prevent any oscillation. Ut can be set to a
value between
Ui min and Ui max according to fig. 10. It is im-
portant to note that the FET can become conductive again
when
UD > Ui – 3V.
Fig. 11
Test circuit with definition of voltage UD and current ID on
Terminal D.
Fig. 12
Definition of Ut and UH
UD
UD high
UD low
Ut
Ui
UH
Vi +
Gi –
Go –
8.2 V
D
UD
+5 V
100 pF
ID
10 k
FET
Ut
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSL5A10-9LIRCDA | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| PSL128-9LIRCDA | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| PSL158-7LIRPCDA | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| PSL248-9LIRCDA | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| PSL5A12-9LIRPCDA | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSL368-9R | 制造商:Power-One 功能描述:DC/DC PS SGL-OUT 36V 8A 288W 11PIN - Bulk |
| PSL-368K | 功能描述:標(biāo)準(zhǔn)環(huán)形接頭 3.6MM PLASTIC SURLOK RADSOK 8AWG 70 AMPS RoHS:否 制造商:TE Connectivity / AMP 系列:Multimate III+ 觸點(diǎn)尺寸: 觸點(diǎn)類型:Pin (Male) 觸點(diǎn)材料: 觸點(diǎn)電鍍:Tin over Nickel 觸點(diǎn)類型2: 電流額定值:13 A 電壓額定值: |
| PSL-3BLACK | 制造商:Panduit Corp 功能描述:LAMINATED STEEL PADLOCK, 0.75" SHACKLE, - Bag 制造商:Panduit Corp 功能描述:Laminated Steel Padlock, .75 Shackle, Black. Color Lock With Black Bumper. |
| PSL-3BLACK-LS | 制造商:Panduit Corp 功能描述:Laminated Steel Padlock, 2.00 Shackle, Black. Color Lock With Black Bumper. 制造商:Panduit Corp 功能描述:LAMINATED STEEL PADLOCK, 2" SHACKLE, BLA - Bag |
| PSL-3BLUE | 制造商:Panduit Corp 功能描述:Laminated Steel Padlock, .75 Shackle, Blue. Color Lock With Blue Bumper. 制造商:Panduit Corp 功能描述:LAMINATED STEEL PADLOCK, 0.75" SHACKLE, - Bag |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。