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  • 參數(shù)資料
    型號: PSS3E25-7EPCB1
    廠商: POWER-ONE INC
    元件分類: 電源模塊
    英文描述: DC-DC REG PWR SUPPLY MODULE
    文件頁數(shù): 18/19頁
    文件大小: 370K
    代理商: PSS3E25-7EPCB1
    PSS, PSK Extended Data Sheet
    Positive Switching Regulator (Industrial)
    REV. FEB 25, 2004
    Page 8 of 19
    Auxiliary Functions
    S
    Sense Lines
    Note: Sense lines should always be connected! It is rec-
    ommended to connect the sense lines directly at the female
    connector. See also:
    Technical Information.
    This feature enables compensation of voltage drop across
    the connector contacts and the load lines. In case the sense
    lines are connected at the load rather than directly at the
    connector, the user must ensure that
    Vo max (between Vo+
    and Go–) is not exceeded.
    Applying generously dimensioned cross-section load leads
    avoids troublesome voltage drop. To minimize noise pick-up
    wire sense lines in parallel or twisted.
    To ensure correct operation, both sense lines must be con-
    nected to their respective power output potential. The volt-
    age difference between any sense line and its respective
    power output pin (as measured on the connector) should
    not exceed the values given in the following table.
    i Inhibit (Remote On / Off)
    Note: With open i input, output is enabled (
    Vo = on)
    The inhibit input allows the switching regulator output to be
    disabled via a control signal. In systems with several units,
    this feature can be used, for example, to control the activa-
    tion sequence of the regulators by a logic signal (TTL, C-
    MOS, etc.). An output voltage overshoot will not occur
    when switching on or off. The inhibit characteristics are ref-
    erenced to the S– remote sense terminal.
    Table 4: Maximum allowed voltage compensation
    Nominal output
    Total voltage difference Voltage difference
    voltage
    between both sense lines
    between
    and their respective output
    Go– and S–
    3.3, 5.1 V
    <0.5 V
    <0.25 V
    12, 15, 24, 36 V
    <1.0 V
    <0.25 V
    Fig. 5
    Sense lines connection
    Vi+
    i
    R
    CS
    Gi–
    Vo+
    S+
    S–
    Go –
    Load
    06046
    Vi+
    Gi–
    S–
    i
    S+
    Iinh
    Vinh
    06047
    Fig. 7
    Definition of Iinh and Vinh
    Table 5: Inhibit characteristics
    Characteristics
    Conditions
    min typ max
    Unit
    Vinh
    Inhibit input voltage to keep
    Vo = on
    Vi min - Vi max
    –50
    +0.8
    V DC
    regulator output voltage -
    Vo = off
    TC min - TC max
    +2.4
    +50
    t r
    Switch-on time after inhibit command
    Vi = Vi nom
    130
    ms
    t f
    Switch-off time after inhibit command
    RL = Vo nom /Io nom
    25
    Ii inh
    Input current when inhibited
    Vi = Vi nom
    25
    mA
    0
    t
    0
    Inhibit
    1
    0.1
    1
    Vo/Vo nom
    tr
    tf
    06001
    Fig. 8
    Output response as a function of inhibit signal
    Fig. 6
    Typical inhibit current Iinh versus inhibit voltage Vinh
    4
    2
    0
    –50 –40
    20
    40
    –30
    0
    –20 –10
    10
    30
    50
    5
    3
    1
    I
    inh [mA]
    V
    inh [V]
    V
    o on
    V
    o off
    V
    inh
    =
    0.8
    V
    inh
    =
    2.4
    V
    06034
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