參數(shù)資料
型號(hào)： PT8401
廠商： Princeton Technology Corporation
元件分類： 通用總線功能
英文描述： MP3 Audio Decoder
中文描述： MP3音頻解碼器
文件頁(yè)數(shù)： 8/28頁(yè)
文件大?。?/td> 228K
代理商： PT8401
Tel : 886-2-29162151
Fax: 886-2-29174598
URL:
http://www.princeton.com.tw
MP3 Audio Decoder
PT8401
PT8401 v 1.3
Page 8
Updated March 2002
Princeton Technology Corp.
Microcontroller can transmit bitstream via the following two types of connections. Please refer to the
diagram below.
Figure 5: Timing of First Serial Bitstream Input Interface.
The maximum bit rate of MPEG is 448kbps. Basically, the speed of input bitstream clock must be
greater than 448KHz. An input bitstream clock of 1MHz is recommended. Since the microcontroller
doesn’t know when to start the bitstream transmission, the DATA_REQ signal is needed to act as the
bitstream transmission indicator. When DATA_REQ is "High", the microcontroller starts another
new bitstream packet transmission. If the DATA_REQ is set to "Low" , bitstream transmission is
terminated. Please refer to
Figure 6
.
Figure 6: Timing of DATA_REQ Signal
SECOND SERIAL DATA INPUT INTERFACE
This port is usually connected with the A/D Converter and is used for speech encoding. The timing of
this port is the similar as that of the serial output interface, except that the signals of the Second Serial
Data Input Interface are inputs. This port also can connect with various ADCs through the setting in
the Start-up Configuration or command register
SetSAI2
. Two bits setting is described below :
Bit 0 : ALRQI2 Left Channel indicating Low/High Selection.
Bit 1 : Delay Selection. When this bit is set, the transition of ALRQI2 is one clock cycle earlier.
This is called I
2
S format.
BCK1
BD1
B_ENA1
OR
Data_valid
Data_valid
Data_invalid
Data_valid
Data_invalid
DATA_REQ
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