
www.ti.com
ELECTRICAL CHARACTERISTICS
at 25°C free-air temperature, V
I
= 5 V, V
O
= 3.3 V, I
O
= I
O
(Max), C
I
= 47 μF (unless otherwise noted)
PTH04000W
SLTS247A–JUNE 2005–REVISED JULY 2005
PARAMETER
TEST CONDITIONS
T
A
= 25
°
C, natural convection
Over I
O
range
T
A
= 25°C
–40
≤
T
A
≤
85°C
Over V
I
range
Over I
O
range
Includes set-point, line, load,
–40
≤
T
A
≤
85°C
V
I
≥
4.5 V
V
I
< 4.5 V
T
A
= 25°C, I
O
= 2 A
R
SET
= 475
, V
O
= 3.3 V
(2)
R
SET
= 2.32 k
, V
O
= 2.5 V
(2)
R
SET
= 6.65 k
, V
O
= 1.8 V
R
SET
= 11.5 k
, V
O
= 1.5 V
R
SET
= 26.1 k
, V
O
= 1.2 V
R
SET
= 84.5 k
, V
O
= 1 V
20 MHz bandwith
MIN
TYP
MAX
UNIT
I
O
V
I
V
O(TOL)
Output current
0
3
(1)
A
Input voltage range
3
(2)
5.5
V
Set-point voltage tolerance
±2%
(3)
Temperature variation
±0.5% V
O
Line regulation
±1
mV
Load regulation
±5
mV
Total output voltage variation
3%
(3)
0.9
3.6
V
O(ADJ)
Output voltage adjust range
V
0.9
V
I
– 1.1
(2)
92%
89%
η
Efficiency
86%
84%
82%
78%
Output voltage ripple
10
mV
PP
A
Overcurrent threshold
Reset, followed by autorecovery
7
1 A/μs load step from 50% to 100% I
O
max,
C
O
= 47 μF
Transient response
Recovery time
70
μs
V
O
over/undershoot
Pin to GND
100
mV
I
IL
track
dV
track
/dt
Track Input Current (pin 2)
–130
μA
Track Slew Rate Capability
C
O
≤
C
O
(max)
1
V/ms
V
I
= increasing
V
I
= decreasing
Input high voltage (V
IH
)
Input low voltage (V
IL
)
Input low current (I
IL
)
Pins 4 and 2 connected, pin 2 open
2.95
3
UVLO
Undervoltage lockout
V
2.7
2.8
V
I
– 0.5
–0.2
Open
(4)
V
Inhibit control (pin 4)
0.6
10
μA
I
I (STBY)
F
S
Input standby current
1
mA
Switching frequency
Over V
I
and I
O
ranges
Ceramic type (C1)
700
kHz
External input capacitance
47
(5)
μF
Ceramic type (C2)
0
(6)
150
μF
External output capacitance
(6)
Nonceramic type (C3)
47
(6)
560
(7)
Equivalent series resistance (nonceramic)
4
(8)
m
Per Telcordia SR-332, 50% stress,
T
A
= 40°C, ground benign
MTBF
Calculated reliability
15
10
6
Hr
(1)
(2)
See SOA temperature derating curves to identify maximum output current at higher ambient temperatures.
The minimum input voltage is 3 V or (V
O
+ 1.1) V, whichever is greater. A 5-V input bus is recommended for output voltages higher than
2 V.
The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
This control pin has an internal pullup to the input voltage V
. An external pullup must not be used. If it is left open circuit, the module
operates when input power is applied. A small low-leakage (< 100 nA) MOS field effect transistor (MOSFET) is recommended for
control. See the application information for further guidance.
An external 47-μF ceramic capacitor is required across the input (V
I
and GND) for proper operation. Locate the capacitor close to the
module.
An external output capacitor is not required for basic operation. Additional capacitance at the load improves the transient response.
This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application
information for further guidance.
This is the minimum ESR for all the electrolytic (nonceramic) capacitance. Use 7 m
as the minimum when calculating the total
equivalent series resistance (ESR) using the max-ESR values specified by the capacitor manufacturer.
(3)
(4)
(5)
(6)
(7)
(8)
3