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ELECTRICAL CHARACTERISTICS
SLTS235C – FEBRUARY 2005 – REVISED FEBRUARY 2008
at 25
°C free-air temperature, V
I = 12 V, VO = 3.3 V, IO = IOmax, CI = 100 F, CO = 100 F (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IO
Output current
TA = 85°C, natural convection airflow
0
2.25
A
PO
Output power
TA = 85°C, natural convection airflow
10
W
Set-point voltage tolerance
TA = 25°C
2 (1)
%
Temperature variation
-40
≤ TA ≤ +85°C
0.5
%Vo
VO
Line regulation
Over VI range
7
mV
Load regulation
Over IO range
0.13
%Vo
Total output voltage variation
Includes set-point, line, load, -40
≤ TA ≤ +85°C
3 (1)
%Vo
VADJ
Output Voltage Adjust Range
Over IO range
0.9
5.5
V
0.9 V
≤ VO ≤ 1.8 V
4.5
VO x 10
(2)
VI
Input Voltage Range
Over VO range
1.8 V < VO ≤ 3.4 V
4.5
18
V
3.4 V < VO ≤ 5.5 V
VO + 1.1
(2)
18(2)
RSET = 348 , VO = 5 V
93.5%
RSET = 1.87 k, VO = 3.3 V
92%
RSET = 3.74 k, VO = 2.5 V
91%
TA = 25°C,
η
Efficiency
RSET = 6.19 k, VO = 2 V
90%
IO = 2 A
RSET = 8.06 k, VO = 1.8 V
89%
RSET = 13 k, VO = 1.5 V
87.5%
RSET = 27.4 k, VO = 1.2 V
86.5%
Output voltage ripple
20 MHz bandwith
30
mVPP
IO (trip)
Overcurrent threshold
Reset, followed by autorecovery
3.5
A
CO = 100 F, 1
Recovery time
50
s
A/s load step
Transient response
from 50% to 100%
VO over/undershoot
70
mV
IOmax
VI = increasing
4.35
4.5
UVLO
Undervoltage lockout
V
VI = decreasing
3.6
4
Input high voltage (VIH)
Open (3)
V
Inhibit control (pin 5)
Input low voltage (VIL)
–0.2
0.5
Input low current (IIL)
5
A
II (stby)
Input standby current
Pins 5 and 2 connected
1
mA
fS
Switching frequency
Over VI and IO ranges
300
kHz
External input capacitance
Electrolytic type (CI)
100 (4)
F
Ceramic type (CO)
220
F
External output capacitance
Nonceramic type (CO)
100(5)
330 (6)
Equivalent series resistance (nonceramic)
10 (7)
m
Per Telcordia SR-332, 50% stress,
MTBF
Calculated reliability
48
106 Hr
TA = 40°C, ground benign
(1)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/
°C or better temperature stability.
(2)
The minimum input voltage is 4.5 V or (VO + 1.1) V, whichever is greater. The maximum input voltage is 18 V or VO × 10, whichever is
less.
(3)
This control pin has an internal pull-up to 3 V (TYP). Do not place an internal pull-up on this pin. If it is left open-circuit, the module
operates when input power is applied. A small low-leakage (< 100 nA) MOSFET is recommended for control. See the application
information for further guidance.
(4)
An external 100-F electrolytic capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to
the module.
(5)
An external 100-F electrolytic capacitor is optional across the output (VO and GND). Locate the capacitor close to the module.
Additional capacitance close to the load improves the response of the regulator to load transients.
(6)
This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application
information for further guidance.
(7)
This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 14 m
as the minimum when calculating the total
equivalent series resistance (ESR) using the maximum ESR values specified by the capacitor manufacturer.
Copyright 2005–2008, Texas Instruments Incorporated
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