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| 型號(hào)： | PTH12030WAZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | ROHS COMPLIANT PACKAGE-13 |
| 文件頁數(shù)： | 21/26頁 |
| 文件大?。?/td> | 794K |
| 代理商： | PTH12030WAZT |
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ELECTRICAL CHARACTERISTICS
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 .................................................................................................................................................... www.ti.com
TA = 25°C, VI = 12 V, VO = 3.3 V, CI= 560 F, CO = 0 F, and IO = IOmax (unless otherwise stated)
PTH12030L
CHARACTERISTICS
CONDITIONS
MIN
TYP
MAX
UNIT
60°C, 200 LFM airflow
0
26(1)
IO
Output current
A
25°C, natural convection
0
26(1)
VI
Input voltage range
Over lO range
10.2
13.8
V
VO tol
Set-point voltage tolerance
±2(2)
%VO
ΔRegtemp
Temperature variation
–40°C < TA < 85°C
±0.5
%VO
ΔRegline
Line regulation
Over VI range
±5
mV
ΔRegload
Load regulation
Over IO range
±5
mV
ΔRegtot
Total output variation
Includes set-point, line, load, –40°C
≤ TA ≤ 85 °C
±3(2)
%VO
ΔVadj
VO adjust range
Over VI range
0.8
1.8
V
RSET = 130
VO = 1.8 V
89%
RSET = 3.57 k
VO = 1.5 V
87%
η
Efficiency
IO = 18 A
RSET = 12.1 k
VO = 1.2 V
85%
RSET = 32.4 k
VO = 1 V
83%
RSET = open cct
VO = 0.8 V
80%
VO ripple (peak-to-peak)
20-MHz bandwidth
15
mVPP
IO trip
Overcurrent threshold
Reset, followed by auto-recovery
50
A
ttr
Recovery Time
50
S
1 A/
s load step,
Transient response
50 to 100% Iomax, CO= 330 F
Vtr
VO over/undershoot
150
mV
Margin up/down adjust
±5
%
Margin control (pins 12&13)
Margin input current, Pin to GND
-8(3)
A
IIL track
Track input current (pin 11)
Pin to GND
–0.13(4)
mA
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
1
V/ms
VI increasing
9.5
UVLO
Undervoltage lockout
V
VI decreasing
8.5
Input high voltage (VIH)
Referenced to GND
2.5
Open(5)
Inhibit
V
control
Input low voltage (VIL)
Referenced to GND
–0.2
0.5
(pin4)
Input low current (IIL)
Pin 4 to GND
0.5
mA
II inh
Input standby current
Inhibit (pin 4) to GND, track (pin 11) VI
10
mA
fs
Switching frequency
Over VI and IO ranges
475
575
675
kHz
CI
External input capacitance
560(6)
F
nonceramic
0
330(7)
7150(8)
Capacitance value
F
External output
CO
ceramic
0
300
capacitance
Equivalent series resistance (nonceramic)
4(9)
m
MTBF
Reliability
Bellcore TR-332, 50% stress, TA= 40°C, ground benign
3
106 Hr
(1)
See SOA curves or consult factory for appropriate derating.
(2)
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/°C (or better) temperature stability.
(3)
A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
(4)
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin.
(5)
This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greater
than 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET or
open-drain/collector voltage supervisor IC is recommended for control. For further information, see the application information section.
(6)
A 560
F electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation.
(7)
An external output capacitor is not required for basic operation. Adding 330
F of distributed capacitance at the load improves the
transient response.
(8)
This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section.
(9)
This is the typical ESR for all the electrolytic (non-ceramic) ouput capacitance. Use 7 m
as the minimum when using max-ESR values
to calculate.
4
Copyright 2003–2008, Texas Instruments Incorporated
Product Folder Link(s): PTH12030W/L
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