Margin Up/Down Controls
U
D
499
R
99.8
k
or R
99.8
k
%
=
-
W
=
-
W
÷
÷
÷
÷
D
è
è
è
è
(4)
2
1
10
9
7
+
PTH12010W
(Top View)
8
6
3
4
5
Margin Up
Margin Down
C
I
R
SET
1%
0.01 W
L
O
A
D
Q2
C
O
+
GND
V
I
UDG-08114
R
U
R
D
Q1
+V
O
+V
O
0 V
GND
SLTS237G – DECEMBER 2004 – REVISED MARCH 2009............................................................................................................................................... www.ti.com
The PTH12060, PTH12010, PTH12020, PTH12030, and PTH12040 products incorporate Margin Up and Margin
Down control inputs. These controls allow the output voltage to be momentarily adjusted,[1] either up or down, by
a nominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over its
supply margin or range. It can also be used to verify the function of supply voltage supervisors. The ±5% change
is applied to the adjusted output voltage, as set by the external resistor, RSET at the VO Adjust pin.
The 5% adjustment is made by pulling the appropriate margin control input directly to the GND terminal [2]. A
low-leakage open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this
purpose[3]. Adjustments of less than 5 % can also be accommodated by adding series resistors to the control
inputs (see RD and RU in Figure 17). The value of the resistor can be selected from Table 5, or calculated using Equation 4. For the same amount of adjustment, the resistor value calculated for RU and RD is the same. Where
Δ% = The desired amount of margin adjust in percent.
Table 5. Margin Up/Down Resistor Values
PERCENT ADJUST (%)
RU / RD(k)
5
0
4
24.9
3
66.5
2
150
1
397
Figure 17. Margin Up/Down Application Schematic
Margin Up/Down Notes
1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. The affects on
the output voltage may not completely cancel, resulting in the possibility of a higher error in the output
voltage set point.
2. The ground reference should be a direct connection to the module’s signal GND (the GND connection
recommended for RSET). This produces a more accurate adjustment at the load circuit terminals. The
transistors Q1 and Q2 should be located close to the regulator.
3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This
includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device
(preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current.
Each input sources 8 A when grounded, and has an open-circuit voltage of 0.8 V.
20
Copyright 2004–2009, Texas Instruments Incorporated