參數(shù)資料
型號(hào)： PXAC37
廠商： NXP Semiconductors N.V.
英文描述： XA 16-bit microcontroller family 32K/1024 OTP CAN transport layer controller 1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID Filters, transport layer co-proce
中文描述： 的XA 16位微控制器系列32K/1024檢察官可以傳輸層控制器1的UART，1個(gè)SPI端口，CAN 2.0B總線，32可以讀取器，傳輸層合作proce
文件頁數(shù)： 22/68頁
文件大小： 368K
代理商： PXAC37
Philips Semiconductors
Preliminary specification
XA-C3
XA 16-bit microcontroller family
32K/1024 OTP CAN transport layer controller
1 UART, 1 SPI Port, CAN 2.0B, 32 CAN ID filters, transport layer co-processor
2000 Jan 25
15
timer register is loaded with FFFF hex. The underflow also sets the
TF2 flag, which can generate an interrupt if enabled.
The External flag EXF2 bit toggles when Timer 2 underflows or
overflows. This EXF2 bit can be used as a 17th bit of resolution, if
needed. the EXF2 bit flag does not generate an interrupt in this
mode. As the baud rate generator, timer T2 is incremented by TCLK.
Baud Rate Generator Mode
By setting the TCLK0 and/or RCLK0 in T2CON, Timer 2 can be
chosen as the baud rate generator for the Transmitter and/or
Receiver sides of UART–0.
Programmable Clock-Out
A 50% duty cycle clock can be programmed to come out on P1.6.
This pin, besides being a regular I/O pin, has two alternate
functions. Either it can be programmed to input the External clock for
Timer/Counter 2 or to output a 50% duty cycle clock.
To configure the Timer/Counter 2 as a clock generator, bit {C2 or
T2
/
} (T2CON[1]) must be cleared and bit T2OE (T2MOD[1]) must be
set. Bit TR2 (T2CON[2]) also must be set to start the timer.
The Clock–Out frequency depends on the oscillator frequency and
the reload value of Timer 2 capture registers (TCAP2H, TCAP2L) as
shown in this equation:
TCLK
2
(65536–TCAP2H,TCAP2L)
In the Clock–Out mode Timer 2 roll–overs will not generate an
interrupt. This is similar to when it is used as a baud–rate generator.
It is possible to use Timer 2 as a baud–rate generator and a clock
generator simultaneously. Note, however, that the baud–rate will be
1/8 of the Clock–Out frequency.
Table 7. Timer 2 Operating Modes
Bits of Special Function Registers
TR2
T2CON[2]
CP or RL2/
T2CON[0]
RCLK0 or TCLK0
T2CON[5] or T2CON[4]
DCEN
T2MOD[0]
MODE
0
X
X
X
Timer off (stopped)
1
0
0
0
16–bit auto–reload, counting up
1
0
0
1
16–bit auto–reload, counting up or down depending on T2EX pin
1
1
0
X
16–bit capture
1
X
1
X
Baud rate generator
T0OE
LSB
MSB
BIT
TSTAT.2
SYMBOL
T1OE
FUNCTION
When 0, this bit allows the T1 pin to clock Timer 1 when in the counter mode.
When 1, T1 acts as an output and toggles at every Timer 1 overflow.
When 0, this bit allows the T0 pin to clock Timer 0 when in the counter mode.
When 1, T0 acts as an output and toggles at every Timer 0 overflow.
TSTAT.0
T0OE
SU00612B
—
T1OE
—
—
—
—
—
TSTAT Address:411
Bit Addressable
Reset Value: 00H
Figure 9. Timer 0 and 1 Extended Status (TSTAT)
DCEN
BIT
T2MOD.5 RCLK1
T2MOD.4 TCLK1
SYMBOL
FUNCTION
Receive Clock Flag.
Transmit Clock Flag. RCLK1 and TCLK1 are used to select Timer 2 overflow rate as a clock source
for UART1 instead of Timer T1.
When 0, this bit allows the T2 pin to clock Timer 2 when in the counter mode.
When 1, T2 acts as an output and toggles at every Timer 2 overflow.
Controls count direction for Timer 2 in autoreload mode.
DCEN=0 counter set to count up only
DCEN=1 counter set to count up or down, depending on T2EX (see text).
T2MOD.1 T2OE
T2MOD.0 DCEN
SU00610B
T2OE
—
—
TCLK1
RCLK1
—
—
T2MOD Address:419
Bit Addressable
Reset Value: 00H
LSB
MSB
Figure 10. Timer 2 Mode Control (T2MOD)
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