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參數(shù)資料
| 型號： | Q67060-S6128 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | High Speed CMOS Logic Dual 4-Input NOR Gates 14-TSSOP -55 to 125 |
| 中文描述： | 智能高側(cè)電源開關(guān)1頻道：1 ×200mз |
| 文件頁數(shù)： | 3/19頁 |
| 文件大?。?/td> | 461K |
| 代理商： | Q67060-S6128 |
2004-01-27
Page 3
BTS 4141D
Maximum Ratings
Parameter
at
T
j
= 25°C
, unless otherwise specified
Supply voltage
Continuous input voltage
2)
Symbol
Value
Unit
V
bb
V
IN
I
L
I
IN
-I
GND
T
j
T
stg
P
tot
E
AS
-0,3
1)
...48
V
-10...
V
bb
self limited
Load current (Short - circuit current, see page 5)
A
Current through input pin (DC)
Reverse current through GND-pin
3)
Operating temperature
Storage temperature
±
5
-0.5
mA
A
°C
internal limited
-55 ... +150
Power dissipation
4)
Inductive load switch-off energy dissipation
4)5)
single pulse
T
j
= 125 °C,
I
L
= 0.5 A
Load dump protection
5)
V
LoadDump6)
=
V
A
+
V
S
R
I
=2
,
t
d
=400ms,
V
IN
= low or high,
V
A
=13,5V
R
L
= 47
E
lectro
s
tatic
d
ischarge voltage
(Human Body Model)
according to ANSI EOS/ESD - S5.1 - 1993
ESD STM5.1 - 1998
Input pin
All other pins
1.4
W
12
J
V
Loaddump
83
V
V
ESD
±
1
±
5
kV
1defined by
P
tot
2At
V
IN > Vbb, the input current is not allowed to exceed ±5 mA.
3defined by
P
tot
4Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70μm thick) copper area for Vbb
connection. PCB is vertical without blown air.
5not subject to production test, specified by design
6
V
Loaddump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 .
Supply voltages higher than
V
bb(AZ) require an external current limit for the GND pin, e.g. with a
150
resistor in GND connection. A resistor for the protection of the input is integrated.
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