參數(shù)資料
型號(hào): Q67100-Q2010
廠商: SIEMENS AG
英文描述: 1M x 32-Bit Dynamic RAM Module
中文描述: 100萬(wàn)× 32位動(dòng)態(tài)隨機(jī)存儲(chǔ)器模塊
文件頁(yè)數(shù): 8/53頁(yè)
文件大?。?/td> 418K
代理商: Q67100-Q2010
HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Data Book
8
12.99
DQM
LDQM
UDQM
Input
Pulse
Active
High
The Data Input/Output mask places the DQ buffers in a
high impedance state when sampled high. In Read mode,
DQM has a latency of two clock cycles and controls the
output buffers like an output enable. In Write mode, DQM
has a latency of zero and operates as a word mask by
allowing input data to be written if it is low but blocks the
write operation if DQM is high.
One DQM input it present in
×
4 and
×
8 SDRAMs, LDQM
and UDQM controls the lower and upper bytes in
×
16
SDRAMs.
V
DD
V
SS
Supply
Power and ground for the input buffers and the core logic.
V
DDQ
V
SSQ
Supply –
Isolated power supply and ground for the output buffers to
provide improved noise immunity.
V
REF
Input
Level
Reference voltage for SDRAM versions supporting SSTL
interface
Signal Pin Description
(cont’d)
Pin
Type
Signal Polarity Function
相關(guān)PDF資料
PDF描述
Q67100-Q2012 1M x 4-BIT DYNAMIC RAM LOW POWER 1M x 4-BIT DYNAMIC RAM
Q67100-Q2014 2M x 32-Bit Dynamic RAM Module
Q67100-Q2015 2M x 32-Bit Dynamic RAM Module
Q67100-Q2016 2M x 32-Bit Dynamic RAM Module
Q67100-Q2017 2M x 32-Bit Dynamic RAM Module
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
Q67100-Q2012 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:1M x 4-BIT DYNAMIC RAM LOW POWER 1M x 4-BIT DYNAMIC RAM
Q67100-Q2014 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2M x 32-Bit Dynamic RAM Module
Q67100-Q2015 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2M x 32-Bit Dynamic RAM Module
Q67100-Q2016 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2M x 32-Bit Dynamic RAM Module
Q67100-Q2017 制造商:INFINEON 制造商全稱(chēng):Infineon Technologies AG 功能描述:2M x 32-Bit Dynamic RAM Module