參數(shù)資料
型號: Q67100-Q2063
廠商: SIEMENS AG
英文描述: 1M x 32-Bit Dynamic RAM Module
中文描述: 100萬× 32位動態(tài)隨機存儲器模塊
文件頁數(shù): 29/53頁
文件大?。?/td> 418K
代理商: Q67100-Q2063
HYB39S64400/800/160BT(L)
64MBit Synchronous DRAM
Semiconductor Group
28
8. Burst Termination
8.1 Termination of a Full Page Burst Read Operation
8.2 Termination of a Full Page Burst Write Operation
SPT03722
CLK
NOP
T0
T1
T2
T3
T4
T5
T6
T7
T8
Command
DOUT A0
DOUT A1 DOUT A2 DOUT A3
NOP
NOP
Burst
Terminate
NOP
NOP
NOP
NOP
latency = 2
, DQ’s
CK2
t
DOUT A3
CK3
latency = 3
t
, DQ’s
DOUT A1
DOUT A0
DOUT A2
(CAS latency = 2, 3)
CAS
CAS
Read A
The burst ends after a delay equal to the CAS latency.
Input data for the Write is masked.
T4
latency = 2, 3
DQ’s
NOP
(CAS latency = 2, 3)
T0
Command
CAS
CLK
DIN A1
T2
NOP
DIN A0
Write A
T1
DIN A2
NOP
T3
SPT03419
T6
Burst
Terminate
NOP
T5
NOP
NOP
T7
NOP
T8
don’t care
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